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Searched refs:MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h	`7762 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x00000010`
dce_8_0_sh_mask.h	`1572 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10`
dce_10_0_sh_mask.h	`1608 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 [all...]`
dce_11_0_sh_mask.h	`1556 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 [all...]`
dce_11_2_sh_mask.h	`1718 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 [all...]`
dce_12_0_sh_mask.h	`2733 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_sh_mask.h	`2095 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 [all...]`
dcn_2_0_0_sh_mask.h	`658 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 [all...]`
dcn_2_1_0_sh_mask.h	`540 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 [all...]`

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