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  /src/sys/arch/hpc/stand/include/machine/
coff_machdep.h 3 #ifdef MIPS
elf_machdep.h 6 #ifdef MIPS
int_const.h 5 #elif defined MIPS
6 #include "../../../../mips/include/int_const.h"
int_fmtio.h 5 #elif defined MIPS
6 #include "../../../../mips/include/int_fmtio.h"
int_limits.h 5 #elif defined MIPS
6 #include "../../../../mips/include/int_limits.h"
int_mwgwtypes.h 5 #elif defined MIPS
6 #include "../../../../mips/include/int_mwgwtypes.h"
int_types.h 5 #elif defined MIPS
6 #include "../../../../mips/include/int_types.h"
platid.h 3 #ifdef MIPS
  /src/sys/arch/hpc/stand/dspgen/
Makefile 3 BUILD_ARCH = ARM SH3 SH4 MIPS
6 TYPE=application sh gen_template.sh vc5 SH MIPS
7 TYPE=static_library sh gen_template.sh vc5 SH MIPS
17 # No MIPS support for eVC++ 4 yet (only supports MIPS II, MIPS IV or MIPS16)
gen_template.sh 264 if [ -f asm_build.MIPS.0 ]; then
265 sed 's/%%% ASM %%%/mipsasm.exe/' asm_build.MIPS.0 > asm_build.MIPS
266 rm -f asm_build.MIPS.0
  /src/distrib/hpcmips/stand/
Makefile 11 HPCBOOTDIR= ${KERNSRCDIR}/arch/hpc/stand/binary/MIPS
  /src/sys/arch/mips/include/
endian_machdep.h 29 # error Define MIPS target CPU endian-ness in port-specific header file.
  /src/sys/arch/hpc/stand/
Makefile 10 binary/MIPS/hpcboot.exe \
54 # (WCE100/101/200 binary for MIPS, SH3)
89 for a in SH3 SH4 ARM MIPS; do \
98 cp compile/MIPSRelease/hpcboot.exe binary/MIPS/hpcboot101.exe
  /src/sys/arch/hpc/stand/hpcboot/
boot.cpp 48 #ifdef MIPS
49 #include <mips/mips_boot.h>
74 #ifdef MIPS
hpcboot.h 57 #ifdef MIPS
135 #elif defined MIPS
machine_config.cpp 50 #ifdef MIPS
101 #endif // MIPS
136 #ifdef MIPS
137 #endif // MIPS
file_http.cpp 47 #if defined MIPS
48 "MIPS"
hpcmenu.cpp 139 #ifdef MIPS
  /src/distrib/ews4800mips/floppies/instkernel/
Makefile 11 MDSET_STRIPSECTIONS= -R .MIPS.abiflags -R .gnu.attributes -R .pdr -R .reginfo
  /src/sys/external/bsd/gnu-efi/dist/gnuefi/
elf_mips64el_efi.lds 4 OUTPUT_ARCH(mips)
62 *(.MIPS.abiflags)
  /src/sys/arch/cobalt/stand/boot/
Makefile 8 MIPS= ${S}/arch/mips
72 LDSCRIPT?= ${MIPS}/conf/stand.ldscript
  /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/brcm/
bcm3384_viper.dtsi 19 /* 1/2 of the CPU core clock (standard MIPS behavior) */
20 mips-hpt-frequency = <300000000>;
  /src/sys/arch/hpc/conf/
platid.def 42 MIPS {
  /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/mti/
sead3.dts 8 #include <dt-bindings/interrupt-controller/mips-gic.h>
14 model = "MIPS SEAD-3";
  /src/sys/arch/mips/mips/
fp.S 43 #include <mips/asm.h>
44 #include <mips/trap.h>
45 #include <mips/cpuregs.h>
47 #include <mips/locore.h>
104 /* insns are reordered in the way as MIPS architecture imposes */
295 PTR_WORD branchc1any2 # sub 9 bc1any2 MIPS-3D ASE
296 PTR_WORD branchc1any4 # sub 10 bc1any4 MIPS-3D ASE
348 PTR_WORD recip2_s # func 28 34 RECIP2.S MIPS-3D ASE
349 PTR_WORD recip1_s # func 29 35 RECIP1.S MIPS-3D ASE
350 PTR_WORD rsqrt1_s # func 30 36 RSQRT1.S MIPS-3D AS
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