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    Searched refs:MIPS3_PG_V (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/arch/mips/include/
mips3_pte.h 93 #define MIPS3_PG_V 0x00000002 /* Valid */
118 #define MIPS3_PG_ROPAGE (MIPS3_PG_V | MIPS3_PG_RO | MIPS3_PG_CACHED)
121 #define MIPS3_PG_RWPAGE (MIPS3_PG_V | MIPS3_PG_D | MIPS3_PG_CACHED)
124 #define MIPS3_PG_RWNCPAGE (MIPS3_PG_V | MIPS3_PG_D | MIPS3_PG_UNCACHED)
127 #define MIPS3_PG_RWAPAGE (MIPS3_PG_V | MIPS3_PG_D | MIPS3_PG_ACC)
130 #define MIPS3_PG_CWPAGE (MIPS3_PG_V | MIPS3_PG_CACHED)
133 #define MIPS3_PG_CWNCPAGE (MIPS3_PG_V | MIPS3_PG_UNCACHED)
136 #define MIPS3_PG_CWAPAGE (MIPS3_PG_V | MIPS3_PG_ACC)
139 (MIPS3_PG_G | MIPS3_PG_V | MIPS3_PG_D | MIPS3_CCA_TO_PG(cca))
pte.h 97 #define mips_pg_v(entry) ((entry) & MIPS3_PG_V)
146 return (entry & MIPS3_PG_V) != 0;
376 | MIPS3_PG_WIRED | MIPS3_PG_V | MIPS3_PG_G;
  /src/sys/arch/newsmips/newsmips/
locore_machdep.S 102 li k1, 0x02|0x18|0x01 # MIPS3_PG_V|MIPS3_PG_CACHED|MIPS3_PG_G
  /src/sys/arch/arc/arc/
minidebug.c 956 if (tlb.tlb_lo0 & MIPS3_PG_V || tlb.tlb_lo1 & MIPS3_PG_V) {
  /src/sys/arch/mips/mips/
db_interface.c 295 !((tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V))
299 (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
mips_fixup.c 214 uint32_t tlb_lo = MIPS3_PG_G|MIPS3_PG_V|MIPS3_PG_D
mipsX_subr.S 1928 and k0, k0, MIPS3_PG_V # check for valid entry
1974 and k0, k0, MIPS3_PG_V # check for valid entry
2277 and a2, MIPS3_PG_V # lo0 V bit
2278 xor a3, a2, MIPS3_PG_V # lo1 V bit
cpu_subr.c 903 const uint32_t tlb_lo = MIPS3_PG_G|MIPS3_PG_V
mips_machdep.c 1905 cpuhdrp->pg_v = MIPS3_PG_V;

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