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Searched refs:MIPS_COP_0_EIRR (Results 1 - 4 of 4) sorted by relevancy

/src/sys/arch/mips/rmi/
rmixl_subr.S	`85 dmfc0 a3, MIPS_COP_0_EIRR /* a3 = EIRR / 88 dmtc0 a3, MIPS_COP_0_EIRR / EIRR = a3 */`
rmixl_spl.S	`92 dmtc0 zero, MIPS_COP_0_EIRR ## clear EIRR 161 dmfc0 v0, MIPS_COP_0_EIRR ## load EIRR 164 dmtc0 v0, MIPS_COP_0_EIRR ## store EIRR 177 dmfc0 v0, MIPS_COP_0_EIRR ## load EIRR 179 dmtc0 v0, MIPS_COP_0_EIRR ## store EIRR 258 dmfc0 ta1, MIPS_COP_0_EIRR # get active interrupts`
/src/sys/arch/mips/include/
cpuregs.h	`507 * 6/6 MIPS_COP_0_EIRR ...6 [RMI] Extended Interrupt Request Register. 629 #define MIPS_COP_0_EIRR _(6), 6 /* RMI */`
/src/sys/arch/mips/mips/
db_interface.c	`459 SHOW64SEL(MIPS_COP_0_EIRR, "eirr");`

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