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    Searched refs:MIPS_SPL_0_1_2_3 (Results 1 - 4 of 4) sorted by relevancy

/src/sys/arch/emips/emips/
xs_bee3.c	69 splvec.splclock = MIPS_SPL_0_1_2_3; //0x3f00 70 splvec.splstatclock = MIPS_SPL_0_1_2_3; //0x3f00
xilinx_ml40x.c	71 splvec.splclock = MIPS_SPL_0_1_2_3; //0x3f00 72 splvec.splstatclock = MIPS_SPL_0_1_2_3; //0x3f00
/src/sys/arch/emips/include/
intr.h	56 #define MIPS_SPL_0_1_2_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1_2)
/src/sys/arch/pmax/include/
intr.h	51 #define MIPS_SPL_0_1_2_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1_2)

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