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Searched refs:MIPS_SR_BEV (Results 1 - 4 of 4) sorted by relevancy

/src/sys/arch/mipsco/mipsco/
locore_machdep.S	`46 li v0, MIPS_SR_BEV # no interrupt and`
/src/sys/arch/newsmips/newsmips/
locore_machdep.S	`68 li v0, MIPS_SR_BEV # no interrupt and`
/src/sys/arch/mips/mips/
mips_machdep.c	`811 mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV); 858 mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV); 907 mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV); 987 mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV); 1042 mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV); 1134 mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV);`
/src/sys/arch/mips/include/
cpuregs.h	`223 #define MIPS_SR_BEV 0x00400000 /* Use boot exception vector */`

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