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    Searched refs:MI_LOAD_REGISTER_REG (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_gpu_commands.h 160 #define MI_LOAD_REGISTER_REG MI_INSTR(0x2A, 1)
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_cmd_parser.c 319 CMD( MI_LOAD_REGISTER_REG, SMI, !F, 0xFF, W,
491 CMD( MI_LOAD_REGISTER_REG, SMI, !F, 0xFF, W,
1255 if (desc->cmd.value == MI_LOAD_REGISTER_REG) {
1592 * 7. Allow MI_LOAD_REGISTER_REG between whitelisted registers.
i915_perf.c 1822 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2);
1840 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2);
1860 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2);
1897 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2);

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