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      1 /*	$NetBSD: cpu.h,v 1.79 2025/11/20 13:48:05 tsutsui Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1988 University of Utah.
      5  * Copyright (c) 1982, 1990, 1993
      6  *	The Regents of the University of California.  All rights reserved.
      7  *
      8  * This code is derived from software contributed to Berkeley by
      9  * the Systems Programming Group of the University of Utah Computer
     10  * Science Department.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  * 3. Neither the name of the University nor the names of its contributors
     21  *    may be used to endorse or promote products derived from this software
     22  *    without specific prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     37  *
     38  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     39  */
     40 
     41 #ifndef _HP300_CPU_H_
     42 #define	_HP300_CPU_H_
     43 
     44 #if defined(_KERNEL_OPT)
     45 #include "opt_lockdebug.h"
     46 #endif
     47 
     48 /*
     49  * Get common m68k CPU definitions.
     50  */
     51 #include <m68k/cpu.h>
     52 
     53 #if defined(_KERNEL)
     54 /*
     55  * Exported definitions unique to hp300/68k cpu support.
     56  */
     57 #include <machine/hp300spu.h>
     58 
     59 /*
     60  * The rest of this should probably be moved to <machine/hp300spu.h>,
     61  * although some of it could probably be put into generic 68k headers.
     62  */
     63 
     64 extern	uint8_t *intiobase, *extiobase;
     65 
     66 /* locore.s functions */
     67 void	doboot(void) __attribute__((__noreturn__));
     68 void	ecacheon(void);
     69 void	ecacheoff(void);
     70 
     71 /* clock.c functions */
     72 void	hp300_calibrate_delay(void);
     73 
     74 /* machdep.c functions */
     75 int	badaddr(void *);
     76 int	badbaddr(void *);
     77 
     78 /* what is this supposed to do? i.e. how is it different than startrtclock? */
     79 #define	enablertclock()
     80 
     81 #endif /* _KERNEL */
     82 
     83 /* physical memory sections */
     84 #define	ROMBASE		(0x00000000)
     85 #define	INTIOBASE	(0x00400000)
     86 #define	INTIOTOP	(0x00600000)
     87 #define	INTIOSIZE	(INTIOTOP - INTIOBASE)
     88 #define	EXTIOBASE	(0x00600000)
     89 #define	EXTIOTOP	(0x20000000)
     90 #define	MAXADDR		((paddr_t)(0 - NBPG))
     91 
     92 /*
     93  * Internal IO space:
     94  *
     95  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
     96  *
     97  * Internal IO space is mapped in the kernel from ``intiobase'' to
     98  * ``intiobase'' + INTIOSIZE.  Since it is always mapped,
     99  * conversion between physical and kernel virtual addresses is easy.
    100  */
    101 #define	ISIIOVA(va)							\
    102 	((uint8_t *)(va) >= intiobase &&				\
    103 	    (uint8_t *)(va) < (intiobase + INTIOSIZE))
    104 #define	IIOV(pa)	((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
    105 #define	IIOP(va)	((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
    106 #define	IIOPOFF(pa)	((paddr_t)(pa)-INTIOBASE)
    107 #define	IIOMAPSIZE	btoc(INTIOSIZE)		/* 2mb */
    108 
    109 /*
    110  * External IO space:
    111  *
    112  * DIO ranges from select codes 0-63 at physical addresses given by:
    113  *	0x600000 + (sc - 32) * 0x10000
    114  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
    115  * their control space and the remaining areas, [0x200000-0x400000) and
    116  * [0x800000-0x1000000), are for additional space required by a card;
    117  * e.g. a display framebuffer.
    118  *
    119  * DIO-II ranges from select codes 132-255 at physical addresses given by:
    120  *	0x1000000 + (sc - 132) * 0x400000
    121  * The address range of DIO-II space is thus [0x1000000-0x20000000).
    122  *
    123  * DIO/DIO-II space is too large to map in its entirety, instead devices
    124  * are mapped into kernel virtual address space allocated from a range
    125  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
    126  */
    127 #define	DIOBASE		(0x600000)
    128 #define	DIOTOP		(0x1000000)
    129 #define	DIOCSIZE	(0x10000)
    130 #define	DIOIIBASE	(0x01000000)
    131 #define	DIOIITOP	(0x20000000)
    132 #define	DIOIICSIZE	(0x00400000)
    133 
    134 /*
    135  * HP MMU
    136  */
    137 #define	MMUBASE		IIOPOFF(0x5F4000)
    138 #define	MMUSSTP		0x0
    139 #define	MMUUSTP		0x4
    140 #define	MMUTBINVAL	0x8
    141 #define	MMUSTAT		0xC
    142 #define	MMUCMD		MMUSTAT
    143 
    144 #define	MMU_UMEN	0x0001	/* enable user mapping */
    145 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
    146 #define	MMU_CEN		0x0004	/* enable data cache */
    147 #define	MMU_BERR	0x0008	/* bus error */
    148 #define	MMU_IEN		0x0020	/* enable instruction cache */
    149 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
    150 #define	MMU_WPF		0x2000	/* write protect fault */
    151 #define	MMU_PF		0x4000	/* page fault */
    152 #define	MMU_PTF		0x8000	/* page table fault */
    153 
    154 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
    155 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
    156 
    157 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
    158 #define M68K_CACHEOPS_MACHDEP
    159 #endif
    160 
    161 #ifdef CACHE_HAVE_PAC
    162 #define M68K_CACHEOPS_MACHDEP_PCIA
    163 #endif
    164 
    165 #ifdef CACHE_HAVE_VAC
    166 #define M68K_CACHEOPS_MACHDEP_DCIA
    167 #define M68K_CACHEOPS_MACHDEP_DCIS
    168 #define M68K_CACHEOPS_MACHDEP_DCIU
    169 #define M68K_CACHEOPS_MACHDEP_TBIA
    170 #define M68K_CACHEOPS_MACHDEP_TBIS
    171 #define M68K_CACHEOPS_MACHDEP_TBIAS
    172 #define M68K_CACHEOPS_MACHDEP_TBIAU
    173 #endif
    174 
    175 #endif /* _HP300_CPU_H_ */
    176