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    Searched refs:MOReg (Results 1 - 11 of 11) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TwoAddressInstructionPass.cpp 773 Register MOReg = MO.getReg();
774 if (!MOReg)
777 Defs.push_back(MOReg);
779 Uses.push_back(MOReg);
780 if (MOReg != Reg && (MO.isKill() ||
781 (LIS && isPlainlyKilled(MI, MOReg, LIS))))
782 Kills.push_back(MOReg);
817 Register MOReg = MO.getReg();
818 if (!MOReg)
821 if (regOverlapsSet(Uses, MOReg, TRI)
    [all...]
DetectDeadLanes.cpp 194 Register MOReg = MO.getReg();
195 if (!Register::isVirtualRegister(MOReg))
201 UsedLanes &= MRI->getMaxLaneMaskForVReg(MOReg);
203 unsigned MORegIdx = Register::virtReg2Index(MOReg);
377 Register MOReg = MO.getReg();
378 if (!MOReg)
382 if (Register::isPhysicalRegister(MOReg)) {
387 assert(Register::isVirtualRegister(MOReg));
388 if (MRI->hasOneDef(MOReg)) {
389 const MachineOperand &MODef = *MRI->def_begin(MOReg);
    [all...]
LiveVariables.cpp 521 Register MOReg = MO.getReg();
523 if (!(Register::isPhysicalRegister(MOReg) && MRI->isReserved(MOReg)))
526 UseRegs.push_back(MOReg);
531 if (Register::isPhysicalRegister(MOReg) && !MRI->isReserved(MOReg))
533 DefRegs.push_back(MOReg);
540 unsigned MOReg = UseRegs[i];
541 if (Register::isVirtualRegister(MOReg))
542 HandleVirtRegUse(MOReg, MBB, MI)
    [all...]
MachineInstrBundle.cpp 325 Register MOReg = MO.getReg();
326 if (!MOReg || !Register::isPhysicalRegister(MOReg))
329 if (!TRI->regsOverlap(MOReg, Reg))
332 bool Covered = TRI->isSuperRegisterEq(Reg, MOReg);
MachineInstr.cpp 998 Register MOReg = MO.getReg();
999 if (!MOReg)
1001 if (MOReg == Reg || (TRI && Reg && MOReg && TRI->regsOverlap(MOReg, Reg)))
1052 Register MOReg = MO.getReg();
1053 bool Found = (MOReg == Reg);
1054 if (!Found && TRI && isPhys && Register::isPhysicalRegister(MOReg)) {
1056 Found = TRI->regsOverlap(MOReg, Reg);
1058 Found = TRI->isSubRegister(MOReg, Reg)
    [all...]
TargetInstrInfo.cpp 1297 const MachineOperand &MOReg = MI.getOperand(OpIdx);
1298 if (MOReg.isUndef())
1304 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(),
1322 const MachineOperand &MOReg = MI.getOperand(1);
1323 if (MOReg.isUndef())
1329 InputReg.Reg = MOReg.getReg();
1330 InputReg.SubReg = MOReg.getSubReg();
MachineCSE.cpp 382 Register MOReg = MO.getReg();
383 if (Register::isVirtualRegister(MOReg))
385 if (PhysRefs.count(MOReg.asMCReg()))
MachineLICM.cpp 1049 Register MOReg = MO.getReg();
1050 if (MOReg != Reg)
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonSubtarget.cpp 500 Register MOReg = MO.getReg();
502 IsSameOrSubReg = (MOReg == DepR);
504 IsSameOrSubReg = getRegisterInfo()->isSubRegisterEq(DepR, MOReg);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZElimCompare.cpp 150 if (Register MOReg = MO.getReg()) {
151 if (TRI->regsOverlap(MOReg, Reg)) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 5349 const MachineOperand *MOReg = &MI.getOperand(1);
5350 if (!MOReg->isUndef())
5351 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(),
5352 MOReg->getSubReg(), ARM::ssub_0));
5354 MOReg = &MI.getOperand(2);
5355 if (!MOReg->isUndef())
5356 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(),
5357 MOReg->getSubReg(), ARM::ssub_1));
5375 const MachineOperand &MOReg = MI.getOperand(2);
5376 if (MOReg.isUndef()
    [all...]

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