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    Searched refs:MOVi32imm (Results 1 - 11 of 11) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/AArch64/
Target.cpp 18 return AArch64::MOVi32imm;
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMInstrInfo.cpp 108 expandLoadStackGuardBase(MI, ARM::MOVi32imm, ARM::LDRi12);
ARMInstructionSelector.cpp 121 unsigned MOVi32imm;
331 STORE_OPCODE(MOVi32imm, MOVi32imm);
723 TII.get(Opcodes.MOVi32imm), Offset);
747 MIB->setDesc(TII.get(Opcodes.MOVi32imm));
756 MIB->setDesc(TII.get(Opcodes.MOVi32imm));
ARMExpandPseudoInsts.cpp 899 (Opcode == ARM::MOVi32imm || Opcode == ARM::MOVCCi32imm)) {
903 assert (MO.isImm() && "MOVi32imm w/ non-immediate source operand!");
2485 case ARM::MOVi32imm:
ARMBaseInstrInfo.cpp 771 case ARM::MOVi32imm:
3282 if (DefOpc != ARM::t2MOVi32imm && DefOpc != ARM::MOVi32imm)
ARMFastISel.cpp 554 Opc = isThumb2 ? ARM::t2MOVi32imm : ARM::MOVi32imm;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ExpandPseudoInsts.cpp 116 /// Expand a MOVi32imm or MOVi64imm pseudo instruction to one or more
1058 case AArch64::MOVi32imm:
AArch64FastISel.cpp 409 unsigned Opc1 = Is64Bit ? AArch64::MOVi64imm : AArch64::MOVi32imm;
AArch64ISelDAGToDAG.cpp 2525 unsigned MOVIOpc = VT == MVT::i32 ? AArch64::MOVi32imm : AArch64::MOVi64imm;
AArch64InstrInfo.cpp 796 /// Returns true if a MOVi32imm or MOVi64imm can be expanded to an ORRxx.
874 // If MOVi32imm or MOVi64imm can be expanded into ORRWri or
876 case AArch64::MOVi32imm:
1955 // It might be nice to use AArch64::MOVi32imm here, which would get
1961 // to insert a AArch64::MOVi32imm before register allocation so that we
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64InstructionSelector.cpp 2402 DefSize == 64 ? AArch64::MOVi64imm : AArch64::MOVi32imm;

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