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    Searched refs:MQ200_GC1 (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/hpcmips/dev/
mq200subr.c 201 [MQ200_I_GCC(MQ200_GC1)] = MQ200_GCCR(MQ200_GC1),
226 //mq200_write(sc, MQ200_GCCR(MQ200_GC1), 0);
227 mq200_write2(sc, &sc->sc_regctxs[MQ200_I_GCC(MQ200_GC1)], 0);
243 mq200_set_pll(sc, clock->gc[MQ200_GC1], crt->clock);
265 mq200_write(sc, MQ200_GCHDCR(MQ200_GC1),
270 mq200_write(sc, MQ200_GCVDCR(MQ200_GC1),
275 mq200_write(sc, MQ200_GCHSCR(MQ200_GC1),
280 mq200_write(sc, MQ200_GCVSCR(MQ200_GC1),
285 //mq200_write(sc, MQ200_GCCR(MQ200_GC1),
    [all...]
mq200reg.h 97 #define MQ200_GC1 0 /* graphice controller 1*/
mq200debug.c 131 reg = mq200_read(sc, MQ200_GCCR(MQ200_GC1));
mq200.c 191 mq200_win_enable(sc, MQ200_GC1, mode,

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