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Searched refs:MT32 (Results 1 - 3 of 3) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
micromips-opc.c	276 #define MT32 ASE_MT 566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 577 {"cttc2", "t,G", 0x00000456, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 652 {"dmt", "", 0x0000057c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 653 {"dmt", "t", 0x0000057c, 0xfc1fffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 712 {"dvpe", "", 0x0000157c, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
micromips-opc.c	276 #define MT32 ASE_MT 566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 577 {"cttc2", "t,G", 0x00000456, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 652 {"dmt", "", 0x0000057c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 653 {"dmt", "t", 0x0000057c, 0xfc1fffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 712 {"dvpe", "", 0x0000157c, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]
/src/external/gpl3/gdb/dist/opcodes/
micromips-opc.c	276 #define MT32 ASE_MT 566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 577 {"cttc2", "t,G", 0x00000456, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 652 {"dmt", "", 0x0000057c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 653 {"dmt", "t", 0x0000057c, 0xfc1fffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 712 {"dvpe", "", 0x0000157c, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]

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