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    Searched refs:MTYPE_CC (Results 1 - 25 of 26) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/
kfd_device_queue_manager_vi.c 113 MTYPE_CC :
117 MTYPE_CC :
171 MTYPE_CC << SH_MEM_CONFIG__DEFAULT_MTYPE__SHIFT |
172 MTYPE_CC << SH_MEM_CONFIG__APE1_MTYPE__SHIFT |
kfd_mqd_manager_vi.c 248 __update_mqd(mm, mqd, q, MTYPE_CC, 1);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gmc_v10_0.c 561 return AMDGPU_PTE_MTYPE_NV10(MTYPE_CC);
amdgpu_gmc_v9_0.c 729 return AMDGPU_PTE_MTYPE_VG10(MTYPE_CC);
amdgpu_gfx_v8_0.c 3702 MTYPE_CC << SH_MEM_CONFIG__DEFAULT_MTYPE__SHIFT |
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_5_1_enum.h 995 MTYPE_CC = 0x2,
bif_5_0_enum.h 1125 MTYPE_CC = 0x2,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
gmc_8_2_enum.h 995 MTYPE_CC = 0x2,
gmc_8_1_enum.h 1125 MTYPE_CC = 0x2,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_8_0_enum.h 995 MTYPE_CC = 0x2,
smu_7_1_1_enum.h 1155 MTYPE_CC = 0x2,
smu_7_1_2_enum.h 1173 MTYPE_CC = 0x2,
smu_7_1_3_enum.h 1209 MTYPE_CC = 0x2,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_6_0_enum.h 1008 MTYPE_CC = 0x2,
uvd_5_0_enum.h 1138 MTYPE_CC = 0x2,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_enum.h 1290 MTYPE_CC = 0x2,
oss_3_0_1_enum.h 1391 MTYPE_CC = 0x2,
oss_3_0_enum.h 1424 MTYPE_CC = 0x2,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_10_0_enum.h 1700 MTYPE_CC = 0x2,
dce_11_0_enum.h 5567 MTYPE_CC = 0x2,
dce_11_2_enum.h 6205 MTYPE_CC = 0x2,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_2_enum.h 6233 MTYPE_CC = 0x2,
gfx_8_0_enum.h 6785 MTYPE_CC = 0x2,
gfx_8_1_enum.h 6735 MTYPE_CC = 0x2,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
navi10_enum.h 289 MTYPE_CC = 0x00000002,

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