HomeSort by: relevance | last modified time | path
    Searched refs:MemSize (Results 1 - 25 of 28) sorted by relevancy

1 2

  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsLegalizerInfo.cpp 23 unsigned MemSize;
29 static bool isUnalignedMemmoryAccess(uint64_t MemSize, uint64_t AlignInBits) {
30 assert(isPowerOf2_64(MemSize) && "Expected power of 2 memory size");
32 if (MemSize > AlignInBits)
51 if (Val.MemSize != QueryMemSize)
129 assert(QueryMemSize <= Size && "Scalar can't hold MemSize");
341 unsigned MemSize = (**MI.memoperands_begin()).getSize();
347 assert(MemSize <= 8 && "MemSize is too large");
350 // Split MemSize into two, P2HalfMemSize is largest power of two smalle
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/arm/
armos.c 513 if (state->MemSize)
514 state->Reg[1] = state->MemSize;
638 if (state->MemSize)
639 temp = state->MemSize;
816 ARMword stack = state->MemSize > 0
817 ? state->MemSize : ADDRUSERSTACK;
arminit.c 113 state->MemSize = 0;
armvirt.c 142 state->MemSize = initmemsize;
armdefs.h 109 ARMword MemSize;
wrapper.c 382 /* Now see if there's a MEMSIZE spec in the environment. */
385 if (strncmp (*env, "MEMSIZE=", sizeof ("MEMSIZE=") - 1) == 0)
390 state->MemSize =
391 strtoul (*env + sizeof ("MEMSIZE=") - 1, &end_of_num, 0);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
CallLowering.cpp 685 uint64_t MemSize = Handler.getStackValueStoreSize(DL, VA);
689 Handler.getStackAddress(MemSize, VA.getLocMemOffset(), MPO, Flags);
691 Handler.assignValueToAddress(Args[i], Part, StackAddr, MemSize, MPO,
710 uint64_t MemSize = Flags.getByValSize();
715 Handler.getStackAddress(MemSize, Offset, DstMPO, Flags);
733 MemSize, VA);
1032 const MachinePointerInfo &SrcPtrInfo, Align SrcAlign, uint64_t MemSize,
1037 MachineMemOperand::MOLoad | MachineMemOperand::MODereferenceable, MemSize,
1043 MemSize, DstAlign);
1048 auto SizeConst = MIRBuilder.buildConstant(SizeTy, MemSize);
    [all...]
LegalizerHelper.cpp 921 unsigned MemSize = MMO.getSizeInBits();
923 if (MemSize == NarrowSize) {
925 } else if (MemSize < NarrowSize) {
927 } else if (MemSize > NarrowSize) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPULegalizerInfo.cpp 270 unsigned MemSize = Query.MMODescrs[0].SizeInBits;
282 if (IsLoad && MemSize < Size)
283 MemSize = std::max(MemSize, Align);
287 if (MemSize != RegSize && RegSize != 32)
290 if (MemSize > maxSizeForAddrSpace(ST, AS, IsLoad))
293 switch (MemSize) {
312 assert(RegSize >= MemSize);
314 if (AlignBits < MemSize) {
316 if (!TLI->allowsMisalignedMemoryAccessesImpl(MemSize, AS
    [all...]
AMDGPUCallLowering.cpp 125 void assignValueToAddress(Register ValVReg, Register Addr, uint64_t MemSize,
131 MemSize = std::min(static_cast<uint64_t>(RegTy.getSizeInBytes()), MemSize);
135 MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, MemSize,
231 uint64_t MemSize, MachinePointerInfo &MPO,
241 MemSize = std::min(MemSize, (uint64_t)RegTy.getSizeInBytes());
242 assignValueToAddress(ValVReg, Addr, MemSize, MPO, VA);
AMDGPURegisterBankInfo.cpp 1156 const unsigned MemSize = 8 * MMO->getSize();
1162 (MemSize == 32 || LoadTy.isVector() || !isScalarLoadLegal(MI)))
1177 B.buildSExtInReg(MI.getOperand(0), WideLoad, MemSize);
1181 B.buildZExtInReg(MI.getOperand(0), WideLoad, MemSize);
1458 const unsigned MemSize = (Ty.getSizeInBits() + 7) / 8;
1464 MemSize, MemAlign);
1466 BaseMMO = MF.getMachineMemOperand(BaseMMO, MMOOffset, MemSize);
1490 BaseMMO = MF.getMachineMemOperand(BaseMMO, MMOOffset + 16 * i, MemSize);
1760 const int MemSize = (*MI.memoperands_begin())->getSize();
1774 switch (8 * MemSize) {
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64CallLowering.cpp 160 void assignValueToAddress(Register ValVReg, Register Addr, uint64_t MemSize,
173 MemSize = LocTy.getSizeInBytes();
177 MemSize, inferAlignFromPtrInfo(MF, MPO));
288 Register Addr, uint64_t MemSize,
290 unsigned MaxSize = MemSize * 8;
303 MemSize = VA.getValVT().getStoreSize();
313 MemSize = VA.getValVT().getStoreSize();
316 assignValueToAddress(ValVReg, Addr, MemSize, MPO, VA);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetInstrInfo.cpp 576 int64_t MemSize = 0;
581 MemSize = MFI.getObjectSize(FI);
592 MemSize = std::max(MemSize, OpSize);
596 assert(MemSize && "Did not expect a zero-sized stack slot");
624 Flags, MemSize, MFI.getObjectAlign(FI));
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
LegalizerInfo.h 176 uint64_t MemSize;
182 MemSize == Other.MemSize;
190 MemSize == Other.MemSize;
CallLowering.h 285 /// Do a memory copy of \p MemSize bytes from \p SrcPtr to \p DstPtr. This
291 uint64_t MemSize, CCValAssign &VA) const;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64LoadStoreOptimizer.cpp 948 int MemSize = TII->getMemScale(*Paired);
950 // If the unscaled offset isn't a multiple of the MemSize, we can't
954 PairedOffset /= MemSize;
956 PairedOffset *= MemSize;
1584 int MemSize = TII->getMemScale(MI);
1586 // If the unscaled offset isn't a multiple of the MemSize, we can't
1588 if (MIOffset % MemSize) {
1594 MIOffset /= MemSize;
1596 MIOffset *= MemSize;
  /src/external/apache2/llvm/dist/llvm/tools/llvm-objcopy/ELF/
Object.cpp 49 Phdr.p_memsz = Seg.MemSize;
1222 Seg.VAddr + Seg.MemSize >= Sec.Addr + SecSize;
1441 Seg.MemSize = Phdr.p_memsz;
1466 PrHdr.FileSize = PrHdr.MemSize = Ehdr.e_phentsize * Ehdr.e_phnum;
2363 ElfHdr.FileSize = ElfHdr.MemSize = sizeof(Elf_Ehdr);
Object.h 456 uint64_t MemSize = 0;
  /src/external/apache2/llvm/dist/llvm/include/llvm/ObjectYAML/
ELFYAML.h 686 Optional<llvm::yaml::Hex64> MemSize;
  /src/external/apache2/llvm/dist/llvm/lib/ObjectYAML/
ELFEmitter.cpp 1165 PHeader.p_memsz = YamlPhdr.MemSize ? uint64_t(*YamlPhdr.MemSize)
ELFYAML.cpp 1031 IO.mapOptional("MemSize", Phdr.MemSize);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonFrameLowering.cpp 2511 unsigned MemSize = HII.getMemAccessSize(MI);
2515 CopyOpc = (MemSize == 1) ? Hexagon::A2_sxtb : Hexagon::A2_sxth;
2517 CopyOpc = (MemSize == 1) ? Hexagon::A2_zxtb : Hexagon::A2_zxth;
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86FastISel.cpp 3566 unsigned MemSize = ResVT.getSizeInBits()/8;
3567 int FI = MFI.CreateStackObject(MemSize, Align(MemSize), false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp 1054 unsigned MemSize = MemN->getMemoryVT().getSizeInBits() / 8;
1055 if (MMOAlign >= MemSize && MemSize > 1)
1056 Alignment = MemSize;
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/
X86AsmParser.cpp 4222 // MemSize corresponding to Suffixes. { 8, 16, 32, 64 } { 32, 64, 80, 0 }
4223 const char *MemSize = Base[0] != 'f' ? "\x08\x10\x20\x40" : "\x20\x40\x50\0";
4253 MemOp->Mem.Size = MemSize[I];

Completed in 60 milliseconds

1 2