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  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSubtarget.h 44 Mips1, Mips2, Mips32, Mips32r2, Mips32r3, Mips32r5, Mips32r6, Mips32Max,
125 // HasMips3_32 - The subset of MIPS-III instructions added to MIPS32
131 // HasMips4_32 - Has the subset of MIPS-IV present in MIPS32
155 // Allow mixed Mips16 and Mips32 in one source file
160 // compiled as Mips32
253 return (MipsArchVersion >= Mips32 && MipsArchVersion < Mips32Max) ||
306 // native mips32 floating point instructions (those runtime routines
307 // run in mips32 hard float mode).
MipsSubtarget.cpp 41 "and Mips32 code in a single output file"),
92 MipsArchVersion = Mips32;
113 "FPU with 64-bit registers is not available on MIPS32 pre revision 2. "
172 errs() << "warning: the 'dspr2' ASE requires MIPS32 revision 2 or "
182 errs() << "warning: the 'dsp' ASE requires MIPS32 revision 2 or "
188 StringRef ArchName = hasMips64() ? "MIPS64" : "MIPS32";

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