| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86PartialReduction.cpp | 78 auto *Mul = dyn_cast<BinaryOperator>(Op);
79 if (!Mul || Mul->getOpcode() != Instruction::Mul)
82 Value *LHS = Mul->getOperand(0);
83 Value *RHS = Mul->getOperand(1);
104 if (Cast->getParent() == Mul->getParent() &&
117 ComputeNumSignBits(Op, *DL, 0, nullptr, Mul) > 16)
123 if (BO->getParent() == Mul->getParent() &&
126 ComputeNumSignBits(Op, *DL, 0, nullptr, Mul) > 16
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMParallelDSP.cpp | 100 /// Create MulCandidates, each rooted at a Mul instruction, that is a part
106 if (I->getOpcode() == Instruction::Mul)
109 if (I->getOpcode() == Instruction::Mul)
124 if (auto *Mul = GetMulOperand(Add->getOperand(0)))
125 InsertMul(Mul);
126 if (auto *Mul = GetMulOperand(Add->getOperand(1)))
127 InsertMul(Mul);
155 /// Return true if enough mul operations are found that can be executed in
172 /// Return the MulCandidate, rooted at mul instruction, that comprise the
176 /// Return the MulCandidate, rooted at mul instructions, that have bee
[all...] |
| MVELaneInterleavingPass.cpp | 145 cast<Instruction>(*E->user_begin())->getOpcode() != Instruction::Mul) {
229 case Instruction::Mul:
|
| MVEGatherScatterLowering.cpp | 144 // Pushes the given mul out of the loop
309 I->getOpcode() == Instruction::Mul) {
316 if (I->getOpcode() == Instruction::Mul)
833 LLVM_DEBUG(dbgs() << "masked gathers/scatters: optimising mul instruction\n");
842 Instruction::Mul, Phi->getIncomingValue(LoopIncrement == 1 ? 0 : 1),
846 BinaryOperator::Create(Instruction::Mul, IncrementPerRound,
876 if ((OpCode == Instruction::Add || OpCode == Instruction::Mul) &&
896 Offs->getOpcode() != Instruction::Mul)
1013 case Instruction::Mul:
1021 dbgs() << "masked gathers/scatters: simplified loop variable add/mul\n")
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| DivRemPairs.cpp | 270 Instruction *Mul = BinaryOperator::CreateMul(DivInst, Y);
271 Instruction *Sub = BinaryOperator::CreateSub(X, Mul);
282 // %mul = mul %div, %y
283 // %rem = sub %x, %mul
285 // If the division dominates, it's already in the right place. The mul+sub
297 // %mul = mul %div, %y
298 // %rem = sub %x, %mul
305 Mul->insertAfter(RemInst)
[all...] |
| Reassociate.cpp | 342 assert((Opcode == Instruction::Mul || Opcode == Instruction::FMul) &&
584 if ((Opcode == Instruction::Mul && match(Tmp, m_Neg(m_Value()))) ||
980 // or subtract or mul or if this is only used by one of the above.
983 for (auto Op : {Instruction::Add, Instruction::Sub, Instruction::Mul,
1077 BinaryOperator *Mul =
1080 Mul->takeName(Shl);
1082 // Everyone now refers to the mul instruction.
1083 Shl->replaceAllUsesWith(Mul);
1084 Mul->setDebugLoc(Shl->getDebugLoc());
1087 // nuw nsw shl into a nuw nsw mul. However, nsw in isolation requires specia
[all...] |
| StraightLineStrengthReduce.cpp | 138 Mul, // (B + i) * S
205 // Allocate candidates and find bases for Mul instructions.
328 if (C.CandidateKind == Candidate::Mul) {
389 case Instruction::Mul:
450 allocateCandidatesAndFindBasis(Candidate::Mul, SE->getSCEV(B), Idx, RHS, I);
456 allocateCandidatesAndFindBasis(Candidate::Mul, SE->getSCEV(B), Idx, RHS, I);
460 allocateCandidatesAndFindBasis(Candidate::Mul, SE->getSCEV(LHS), Zero, RHS,
472 assert(I->getNumOperands() == 2 && "isn't I a mul?");
654 case Candidate::Mul: {
|
| NaryReassociate.cpp | 299 case Instruction::Mul:
511 case Instruction::Mul:
526 case Instruction::Mul:
540 case Instruction::Mul:
|
| SpeculativeExecution.cpp | 218 case Instruction::Mul:
|
| /src/external/apache2/llvm/dist/llvm/lib/IR/ |
| ReplaceConstant.cpp | 35 case Instruction::Mul:
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/AggressiveInstCombine/ |
| TruncInstCombine.cpp | 60 case Instruction::Mul:
126 case Instruction::Mul:
356 case Instruction::Mul:
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 48 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
50 SDValue InFlag = SDValue(Mul, 0);
194 /// Mul with two results
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 9 // This file implements the visit functions for mul, fmul, sdiv, udiv, fdiv,
107 // mul (select Cond, 1, -1), OtherOp --> select Cond, OtherOp, -OtherOp
108 // mul OtherOp, (select Cond, 1, -1) --> select Cond, OtherOp, -OtherOp
113 // mul (select Cond, -1, 1), OtherOp --> select Cond, -OtherOp, OtherOp
114 // mul OtherOp, (select Cond, -1, 1) --> select Cond, -OtherOp, OtherOp
177 BinaryOperator *Mul = cast<BinaryOperator>(I.getOperand(0));
179 if (I.hasNoUnsignedWrap() && Mul->hasNoUnsignedWrap())
181 if (I.hasNoSignedWrap() && Mul->hasNoSignedWrap() &&
219 // Simplify mul instructions with a constant RHS.
225 Value *Mul = Builder.CreateMul(C1, Op1)
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| Operator.h | 64 /// Mul, and Shl. It does not include SDiv, despite that operator having the
103 I->getOpcode() == Instruction::Mul ||
109 CE->getOpcode() == Instruction::Mul ||
436 : public ConcreteOperator<OverflowingBinaryOperator, Instruction::Mul> {
|
| Instruction.h | 527 /// In LLVM, the Add, Mul, And, Or, and Xor operators are associative.
532 Opcode == Add || Opcode == Mul;
546 case Mul: case FMul:
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVTargetTransformInfo.cpp | 59 case Instruction::Mul:
|
| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/ |
| VLASizeChecker.cpp | 117 SVal Mul = SVB.evalBinOpNN(State, BO_Mul, ArrSize, IndexLength, SizeTy);
118 if (auto MulNonLoc = Mul.getAs<NonLoc>())
|
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| IVDescriptors.cpp | 55 case RecurKind::Mul:
77 case RecurKind::Mul:
605 case Instruction::Mul:
606 return InstDesc(Kind == RecurKind::Mul, I);
664 if (AddReductionVar(Phi, RecurKind::Mul, TheLoop, FMF, RedDes, DB, AC, DT)) {
665 LLVM_DEBUG(dbgs() << "Found a MUL reduction PHI." << *Phi << "\n");
801 case RecurKind::Mul:
843 case RecurKind::Mul:
844 return Instruction::Mul;
|
| ScalarEvolution.cpp | 426 const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(this);
427 if (!Mul) return false;
430 const SCEVConstant *SC = dyn_cast<SCEVConstant>(Mul->getOperand(0));
2196 const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(Ops[i]);
2197 if (Mul && isa<SCEVConstant>(Mul->getOperand(0))) {
2199 Scale * cast<SCEVConstant>(Mul->getOperand(0))->getAPInt();
2200 if (Mul->getNumOperands() == 2 && isa<SCEVAddExpr>(Mul->getOperand(1))) {
2202 const SCEVAddExpr *Add = cast<SCEVAddExpr>(Mul->getOperand(1))
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/FuzzMutate/ |
| Operations.cpp | 21 Ops.push_back(binOpDescriptor(1, Instruction::Mul));
99 case Instruction::Mul:
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 573 /// add(add(mul(x,y),a),b). If requireIntermediatesHaveOneUse is true then
598 if (OtherOp.getOpcode() == ISD::MUL) {
599 // add(add(a,b),mul(x,y))
608 if (AddOp.getOperand(0).getOpcode() == ISD::MUL) {
609 // add(add(mul(x,y),a),b)
618 if (AddOp.getOperand(1).getOpcode() == ISD::MUL) {
619 // add(add(a,mul(x,y)),b)
634 SDValue Mul;
636 if (N->getOperand(0).getOpcode() == ISD::MUL) {
637 Mul = N->getOperand(0)
[all...] |
| /src/external/apache2/llvm/dist/clang/include/clang/AST/ |
| StmtVisitor.h | 127 BINOP_FALLBACK(Mul) BINOP_FALLBACK(Div) BINOP_FALLBACK(Rem)
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
| IVDescriptors.h | 40 Mul, ///< Product of integers.
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| ExpandReductions.cpp | 40 return Instruction::Mul;
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| Utils.cpp | 754 unsigned Mul = OrigSize * TargetSize;
756 return Mul / GCDSize;
776 int Mul = OrigTy.getNumElements() * TargetTy.getNumElements();
777 return LLT::vector(Mul / GCDElts, OrigTy.getElementType());
|
