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    Searched refs:MulRHS (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 1227 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1);
1231 std::swap(MulLHS, MulRHS);
1233 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt.");
1234 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2();
1596 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1);
1600 std::swap(MulLHS, MulRHS);
1602 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt.");
1603 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIISelLowering.cpp 10363 SDValue MulRHS = LHS.getOperand(1);
10368 numBitsUnsigned(MulRHS, DAG) <= 32) {
10370 MulRHS = DAG.getZExtOrTrunc(MulRHS, SL, MVT::i32);
10372 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false);
10375 if (numBitsSigned(MulLHS, DAG) < 32 && numBitsSigned(MulRHS, DAG) < 32) {
10377 MulRHS = DAG.getSExtOrTrunc(MulRHS, SL, MVT::i32);
10379 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true);

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