HomeSort by: relevance | last modified time | path
    Searched refs:NUMBER_OF_M3ARB_PARAM_SETS (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_sumo_smc.c 84 for (i = 0; i < NUMBER_OF_M3ARB_PARAM_SETS; i++)
88 for (; i < NUMBER_OF_M3ARB_PARAM_SETS * 2; i++)
90 pi->sys_info.csr_m3_arb_cntl_uvd[i % NUMBER_OF_M3ARB_PARAM_SETS]);
92 for (; i < NUMBER_OF_M3ARB_PARAM_SETS * 3; i++)
94 pi->sys_info.csr_m3_arb_cntl_fs3d[i % NUMBER_OF_M3ARB_PARAM_SETS]);
sumo_dpm.h 54 #define NUMBER_OF_M3ARB_PARAM_SETS 10
93 u32 csr_m3_arb_cntl_default[NUMBER_OF_M3ARB_PARAM_SETS];
94 u32 csr_m3_arb_cntl_uvd[NUMBER_OF_M3ARB_PARAM_SETS];
95 u32 csr_m3_arb_cntl_fs3d[NUMBER_OF_M3ARB_PARAM_SETS];
radeon_sumo_dpm.c 1695 for (i = 0; i < NUMBER_OF_M3ARB_PARAM_SETS; i++) {
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
ppatomctrl.h 170 #ifndef NUMBER_OF_M3ARB_PARAM_SETS
171 #define NUMBER_OF_M3ARB_PARAM_SETS 10
182 uint32_t ul_csr_m3_srb_cntl[NUMBER_OF_M3ARB_PARAM_SETS][NUMBER_OF_M3ARB_PARAMS];/* arrays with values for CSR M3 arbiter for default */

Completed in 76 milliseconds