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    Searched refs:NV_MAIBOX_CONTROL_RCV_OFFSET_BYTE (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
mxgpu_nv.h 41 #define NV_MAIBOX_CONTROL_RCV_OFFSET_BYTE (SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF_MAILBOX_CONTROL) * 4 + 1)
amdgpu_mxgpu_nv.c 42 WREG8(NV_MAIBOX_CONTROL_RCV_OFFSET_BYTE, 2);

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