HomeSort by: relevance | last modified time | path
    Searched refs:NextCycle (Results 1 - 5 of 5) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
GCNILPSched.cpp 46 void advanceToCycle(unsigned NextCycle);
268 void GCNILPScheduler::advanceToCycle(unsigned NextCycle) {
269 if (NextCycle <= CurCycle)
271 CurCycle = NextCycle;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachineScheduler.cpp 2293 void SchedBoundary::bumpCycle(unsigned NextCycle) {
2297 if (MinReadyCycle > NextCycle)
2298 NextCycle = MinReadyCycle;
2301 unsigned DecMOps = SchedModel->getIssueWidth() * (NextCycle - CurrCycle);
2305 if ((NextCycle - CurrCycle) > DependentLatency)
2308 DependentLatency -= (NextCycle - CurrCycle);
2312 CurrCycle = NextCycle;
2315 for (; CurrCycle != NextCycle; ++CurrCycle) {
2345 unsigned Cycles, unsigned NextCycle) {
2401 unsigned NextCycle = CurrCycle
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonMachineScheduler.cpp 368 unsigned NextCycle = std::max(CurrCycle + 1, MinReadyCycle);
372 CurrCycle = NextCycle;
375 for (; CurrCycle != NextCycle; ++CurrCycle) {
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGRRList.cpp 255 void AdvanceToCycle(unsigned NextCycle);
629 void ScheduleDAGRRList::AdvanceToCycle(unsigned NextCycle) {
630 if (NextCycle <= CurCycle)
634 AvailableQueue->setCurCycle(NextCycle);
637 CurCycle = NextCycle;
640 for (; CurCycle != NextCycle; ++CurCycle) {
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachineScheduler.h 784 void bumpCycle(unsigned NextCycle);

Completed in 33 milliseconds