| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| X86ShuffleDecode.h | 35 void DecodeInsertElementMask(unsigned NumElts, unsigned Idx, unsigned Len,
46 void DecodeMOVSLDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
48 void DecodeMOVSHDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
50 void DecodeMOVDDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
52 void DecodePSLLDQMask(unsigned NumElts, unsigned Imm,
55 void DecodePSRLDQMask(unsigned NumElts, unsigned Imm,
58 void DecodePALIGNRMask(unsigned NumElts, unsigned Imm,
61 void DecodeVALIGNMask(unsigned NumElts, unsigned Imm,
65 void DecodePSHUFMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm,
69 void DecodePSHUFHWMask(unsigned NumElts, unsigned Imm
[all...] |
| X86ShuffleDecode.cpp | 48 void DecodeInsertElementMask(unsigned NumElts, unsigned Idx, unsigned Len,
50 assert((Idx + Len) <= NumElts && "Insertion out of range");
52 for (unsigned i = 0; i != NumElts; ++i)
55 ShuffleMask[Idx + i] = NumElts + i;
76 void DecodeMOVSLDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask) {
77 for (int i = 0, e = NumElts / 2; i < e; ++i) {
83 void DecodeMOVSHDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask) {
84 for (int i = 0, e = NumElts / 2; i < e; ++i) {
90 void DecodeMOVDDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask) {
93 for (unsigned l = 0; l < NumElts; l += NumLaneElts
[all...] |
| X86ATTInstPrinter.cpp | 172 unsigned NumElts;
174 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16;
176 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8;
178 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4;
179 OS << "{1to" << NumElts << "}";
314 unsigned NumElts;
316 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16;
318 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8;
320 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4;
321 OS << "{1to" << NumElts << "}";
[all...] |
| X86IntelInstPrinter.cpp | 162 unsigned NumElts;
164 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16;
166 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8;
168 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4;
169 OS << "{1to" << NumElts << "}";
302 unsigned NumElts;
304 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16;
306 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8;
308 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4;
309 OS << "{1to" << NumElts << "}";
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86ShuffleDecodeConstantPool.cpp | 128 unsigned NumElts = Width / 8;
129 assert((NumElts == 16 || NumElts == 32 || NumElts == 64) &&
132 for (unsigned i = 0; i != NumElts; ++i) {
167 unsigned NumElts = Width / ElSize;
169 assert((NumElts == 2 || NumElts == 4 || NumElts == 8 || NumElts == 16) &
[all...] |
| X86PartialReduction.cpp | 140 unsigned NumElts = MulTy->getNumElements();
145 SmallVector<int, 16> EvenMask(NumElts / 2);
146 SmallVector<int, 16> OddMask(NumElts / 2);
147 for (int i = 0, e = NumElts / 2; i != e; ++i) {
159 SmallVector<int, 32> ConcatMask(NumElts);
215 unsigned NumElts = OpTy->getNumElements();
219 if (ST->hasBWI() && NumElts >= 64) {
222 } else if (ST->hasAVX2() && NumElts >= 32) {
232 if (NumElts < 16) {
235 for (unsigned i = 0; i != NumElts; ++i
[all...] |
| X86ISelLowering.cpp | 2117 handleMaskRegisterForCallingConv(unsigned NumElts, CallingConv::ID CC,
2121 if (NumElts == 2)
2123 if (NumElts == 4)
2125 if (NumElts == 8 && CC != CallingConv::X86_RegCall &&
2128 if (NumElts == 16 && CC != CallingConv::X86_RegCall &&
2133 if (NumElts == 32 && (!Subtarget.hasBWI() || CC != CallingConv::X86_RegCall))
2136 if (NumElts == 64 && Subtarget.hasBWI() && CC != CallingConv::X86_RegCall) {
2143 if (!isPowerOf2_32(NumElts) || (NumElts == 64 && !Subtarget.hasBWI()) ||
2144 NumElts > 64
[all...] |
| X86MCInstLower.cpp | 2317 int NumElts;
2320 case X86::MOVDDUPrm: NumElts = 2; break;
2321 case X86::VMOVDDUPrm: NumElts = 2; break;
2322 case X86::VMOVDDUPZ128rm: NumElts = 2; break;
2323 case X86::VBROADCASTSSrm: NumElts = 4; break;
2324 case X86::VBROADCASTSSYrm: NumElts = 8; break;
2325 case X86::VBROADCASTSSZ128rm: NumElts = 4; break;
2326 case X86::VBROADCASTSSZ256rm: NumElts = 8; break;
2327 case X86::VBROADCASTSSZrm: NumElts = 16; break;
2328 case X86::VBROADCASTSDYrm: NumElts = 4; break
[all...] |
| X86InstCombineIntrinsic.cpp | 352 int NumElts = VT->getNumElements();
375 for (int I = 0; I < NumElts; ++I) {
523 unsigned NumElts = ArgTy->getNumElements();
525 Type *IntegerTy = Builder.getIntNTy(NumElts);
811 unsigned NumElts = VecTy->getNumElements();
812 assert((NumElts == 16 || NumElts == 32 || NumElts == 64) &&
820 for (unsigned I = 0; I < NumElts; ++I) {
839 Index = ((Index < 0) ? NumElts : Index & 0x0F) + (I & 0xF0)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Bitstream/Reader/ |
| BitstreamReader.cpp | 101 unsigned NumElts = MaybeVBR.get();
102 for (unsigned i = 0; i != NumElts; ++i)
145 unsigned NumElts = MaybeNum.get();
159 JumpToBit(GetCurrentBitNo() + static_cast<uint64_t>(NumElts) *
165 for (; NumElts; --NumElts)
173 if (Error Err = JumpToBit(GetCurrentBitNo() + NumElts * 6))
185 unsigned NumElts = MaybeNum.get();
189 const size_t NewEnd = GetCurrentBitNo() + alignTo(NumElts, 4) * 8;
216 uint32_t NumElts = MaybeNumElts.get()
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| AArch64PostLegalizerLowering.cpp | 66 static bool isREVMask(ArrayRef<int> M, unsigned EltSize, unsigned NumElts,
81 for (unsigned i = 0; i < NumElts; ++i) {
93 /// Determines if \p M is a shuffle vector mask for a TRN of \p NumElts.
95 static bool isTRNMask(ArrayRef<int> M, unsigned NumElts,
97 if (NumElts % 2 != 0)
100 for (unsigned i = 0; i < NumElts; i += 2) {
103 static_cast<unsigned>(M[i + 1]) != i + NumElts + WhichResult))
112 unsigned NumElts) {
119 unsigned MaskBits = APInt(32, NumElts * 2).logBase2();
133 // <-1, -1, 0, 1, ...> is treated as <2*NumElts-2, 2*NumElts-1, 0, 1, ...>
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| InstCombineVectorOps.cpp | 189 ElementCount NumElts =
191 if (NumSrcElts == NumElts)
195 assert(NumSrcElts.isScalable() == NumElts.isScalable() &&
200 if (NumSrcElts.getKnownMinValue() < NumElts.getKnownMinValue()) {
212 NumElts.getKnownMinValue() / NumSrcElts.getKnownMinValue();
348 unsigned NumElts = EC.getKnownMinValue();
352 if (!EC.isScalable() && IndexC->getValue().uge(NumElts))
358 if (!EC.isScalable() && NumElts != 1) {
362 APInt UndefElts(NumElts, 0);
363 APInt DemandedElts(NumElts, 0)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/IR/ |
| AutoUpgrade.cpp | 1043 unsigned NumElts = ResultTy->getNumElements() * 8;
1046 Type *VecTy = FixedVectorType::get(Builder.getInt8Ty(), NumElts);
1057 for (unsigned l = 0; l != NumElts; l += 16)
1059 unsigned Idx = NumElts + i - Shift;
1060 if (Idx < NumElts)
1061 Idx -= NumElts - 16; // end of lane, switch operand.
1065 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts));
1077 unsigned NumElts = ResultTy->getNumElements() * 8;
1080 Type *VecTy = FixedVectorType::get(Builder.getInt8Ty(), NumElts);
1091 for (unsigned l = 0; l != NumElts; l += 16
[all...] |
| IRBuilder.cpp | 546 ElementCount NumElts = PtrsTy->getElementCount();
547 auto *DataTy = VectorType::get(PtrTy->getElementType(), NumElts);
551 VectorType::get(Type::getInt1Ty(Context), NumElts));
576 ElementCount NumElts = PtrsTy->getElementCount();
580 assert(NumElts == DataTy->getElementCount() &&
587 VectorType::get(Type::getInt1Ty(Context), NumElts));
1024 int NumElts = Ty->getElementCount().getKnownMinValue();
1025 for (int i = 0; i < NumElts; ++i)
1026 ShuffleMask.push_back(NumElts - i - 1);
1045 unsigned NumElts = cast<FixedVectorType>(V1->getType())->getNumElements()
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/ADT/ |
| SmallVector.h | 382 void growAndAssign(size_t NumElts, const T &Elt) {
385 T *NewElts = mallocForGrow(NumElts, NewCapacity);
386 std::uninitialized_fill_n(NewElts, NumElts, Elt);
389 this->set_size(NumElts);
528 void growAndAssign(size_t NumElts, T Elt) {
532 this->grow(NumElts);
533 std::uninitialized_fill_n(this->begin(), NumElts, Elt);
534 this->set_size(NumElts);
669 void assign(size_type NumElts, ValueParamT Elt) {
671 if (NumElts > this->capacity())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypesGeneric.cpp | 347 unsigned NumElts = 2;
351 NumElts);
355 NumElts = N->getValueType(0).getVectorNumElements();
360 IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType());
363 DAG.getBuildVector(NVT, dl, makeArrayRef(Ops.data(), NumElts));
374 unsigned NumElts = VecVT.getVectorNumElements();
385 NewElts.reserve(NumElts*2);
387 for (unsigned i = 0; i < NumElts; ++i) {
412 unsigned NumElts = VecVT.getVectorNumElements();
424 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2)
[all...] |
| LegalizeVectorTypes.cpp | 3281 unsigned NumElts = VT.getVectorNumElements();
3283 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
3284 NumElts = NumElts / 2;
3285 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
3288 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
3296 if (NumElts == 1)
3309 // NumElts := greatest legal vector size (at most WidenVT)
3311 // take munches of size NumElts from the beginning and add to ConcatOps
3312 // NumElts := next smaller supported vector size or
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| MVELaneInterleavingPass.cpp | 288 unsigned NumElts = VT->getNumElements();
292 if (BaseElts == 0 || NumElts % BaseElts != 0) {
323 for (unsigned Base = 0; Base < NumElts; Base += BaseElts) {
329 for (unsigned Base = 0; Base < NumElts; Base += BaseElts) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ |
| TargetLoweringObjectFile.cpp | 109 unsigned NumElts = CDS->getNumElements();
110 assert(NumElts != 0 && "Can't have an empty CDS");
112 if (CDS->getElementAsInteger(NumElts-1) != 0)
116 for (unsigned i = 0; i != NumElts-1; ++i)
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| PoisonChecking.cpp | 205 unsigned NumElts = VecVTy->getNumElements();
208 ConstantInt::get(Idx->getType(), NumElts));
218 unsigned NumElts = VecVTy->getNumElements();
221 ConstantInt::get(Idx->getType(), NumElts));
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| RelLookupTableConverter.cpp | 95 unsigned NumElts = LookupTableArr->getType()->getNumElements();
97 ArrayType::get(Type::getInt32Ty(M.getContext()), NumElts);
106 SmallVector<Constant *, 64> RelLookupTableContents(NumElts);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| InterleavedAccessPass.cpp | 151 /// <Index, Index+Factor, ..., Index+(NumElts-1)*Factor>
207 unsigned NumElts = Mask.size();
208 if (NumElts < 4)
213 if (NumElts % Factor)
216 unsigned LaneLen = NumElts / Factor;
|
| /src/external/apache2/llvm/dist/clang/include/clang/AST/ |
| APValue.h | 271 unsigned NumElts;
272 Vec() : Elts(nullptr), NumElts(0) {}
277 unsigned NumElts, ArrSize;
278 Arr(unsigned NumElts, unsigned ArrSize);
499 return ((const Vec *)(const void *)&Data)->NumElts;
523 return ((const Arr *)(const void *)&Data)->NumElts;
683 V->NumElts = N;
684 return {V->Elts, V->NumElts};
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 187 unsigned NumElts = VT.getVectorNumElements();
192 if (EltVT == MVT::f16 && NumElts % 2 == 0) {
194 NumElts /= 2;
196 for (unsigned j = 0; j != NumElts; ++j) {
237 unsigned NumElts = AccessSize / EltSize;
239 if (AccessSize != EltSize * NumElts)
243 if (Idx + NumElts > ValueVTs.size())
247 if (NumElts != 4 && NumElts != 2)
250 for (unsigned j = Idx + 1; j < Idx + NumElts; ++j)
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/InstCombine/ |
| InstCombiner.h | 348 unsigned NumElts = InVTy->getNumElements();
349 SmallVector<Constant *, 16> Out(NumElts);
350 for (unsigned i = 0; i != NumElts; ++i) {
|
