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    Searched refs:OPENPIC_BASE (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/arch/powerpc/booke/
e500_timer.c 74 OPENPIC_BASE + offset, val);
e500_intr.c 465 OPENPIC_BASE + offset);
473 OPENPIC_BASE + offset, val);
  /src/sys/arch/evbppc/mpc85xx/
machdep.c 1002 cpu_write_4(OPENPIC_BASE + OPENPIC_CTPR, 15); /* IPL_HIGH */
1210 cpu_write_4(OPENPIC_BASE + OPENPIC_GCR, GCR_RST);
1211 while (cpu_read_4(OPENPIC_BASE + OPENPIC_GCR) & GCR_RST)
1214 cpu_write_4(OPENPIC_BASE + OPENPIC_CTPR, 15); /* IPL_HIGH */
1217 cpu_read_4(OPENPIC_BASE + OPENPIC_CTPR));
  /src/sys/arch/powerpc/booke/pci/
pq3pci.c 1167 msig->msig_msir = OPENPIC_BASE + OPENPIC_MSIR(msig->msig_group);
1481 sc->sc_bst->pbs_offset + OPENPIC_BASE + OPENPIC_MSIIR);
  /src/sys/arch/powerpc/include/booke/
e500reg.h 271 #define OPENPIC_BASE 0x40000

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