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    Searched refs:OTG_H_TIMING_DIV_BY2 (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_optc.c 234 OTG_H_TIMING_DIV_BY2, h_div_2);
285 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_BY2, 1);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_optc.h 196 SF(OTG0_OTG_H_TIMING_CNTL, OTG_H_TIMING_DIV_BY2, mask_sh),\
334 type OTG_H_TIMING_DIV_BY2;\
amdgpu_dcn10_optc.c 297 OTG_H_TIMING_DIV_BY2, h_div);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
navi10_enum.h 4728 * OTG_H_TIMING_DIV_BY2 enum
4731 typedef enum OTG_H_TIMING_DIV_BY2 {
4734 } OTG_H_TIMING_DIV_BY2;

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