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    Searched refs:OffImm (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
ARMInstPrinter.cpp 362 int32_t OffImm = (int32_t)MO1.getImm();
363 bool isSub = OffImm < 0;
366 if (OffImm == INT32_MIN)
367 OffImm = 0;
369 O << markup("<imm:") << "#-" << formatImm(-OffImm) << markup(">");
371 O << markup("<imm:") << "#" << formatImm(OffImm) << markup(">");
1045 int32_t OffImm = (int32_t)MO.getImm() << scale;
1048 if (OffImm == INT32_MIN)
1050 else if (OffImm < 0)
1051 O << "#-" << -OffImm;
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp 106 bool SelectAddrModeImm12(SDValue N, SDValue &Base, SDValue &OffImm);
139 SDValue &OffImm);
141 SDValue &OffImm);
143 SDValue &OffImm);
145 SDValue &OffImm);
146 bool SelectThumbAddrModeSP(SDValue N, SDValue &Base, SDValue &OffImm);
148 bool SelectTAddrModeImm7(SDValue N, SDValue &Base, SDValue &OffImm);
151 bool SelectT2AddrModeImm12(SDValue N, SDValue &Base, SDValue &OffImm);
153 bool SelectT2AddrModeImm8(SDValue N, SDValue &Base, SDValue &OffImm);
155 SDValue &OffImm);
    [all...]
ARMLoadStoreOptimizer.cpp 1797 int OffImm = getMemoryOpOffset(*MI);
1801 if (OddRegNum > EvenRegNum && OffImm == 0) {
1829 ? (isT2 ? (OffImm < 0 ? ARM::t2LDRi8 : ARM::t2LDRi12) : ARM::LDRi12)
1830 : (isT2 ? (OffImm < 0 ? ARM::t2STRi8 : ARM::t2STRi12) : ARM::STRi12);
1834 ? (isT2 ? (OffImm+4 < 0 ? ARM::t2LDRi8 : ARM::t2LDRi12) : ARM::LDRi12)
1835 : (isT2 ? (OffImm+4 < 0 ? ARM::t2STRi8 : ARM::t2STRi12) : ARM::STRi12);
1840 InsertLDR_STR(MBB, MBBI, OffImm + 4, isLd, NewOpc2, OddReg, OddDeadKill,
1842 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill,
1856 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill,
1859 InsertLDR_STR(MBB, MBBI, OffImm + 4, isLd, NewOpc2, OddReg, OddDeadKill
    [all...]
ARMBaseInstrInfo.cpp 213 unsigned OffImm = MI.getOperand(NumOps - 2).getImm();
218 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub;
219 unsigned Amt = ARM_AM::getAM2Offset(OffImm);
232 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm);
252 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub;
253 unsigned Amt = ARM_AM::getAM3Offset(OffImm);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp 80 bool SelectAddrModeIndexed7S8(SDValue N, SDValue &Base, SDValue &OffImm) {
81 return SelectAddrModeIndexed7S(N, 1, Base, OffImm);
83 bool SelectAddrModeIndexed7S16(SDValue N, SDValue &Base, SDValue &OffImm) {
84 return SelectAddrModeIndexed7S(N, 2, Base, OffImm);
86 bool SelectAddrModeIndexed7S32(SDValue N, SDValue &Base, SDValue &OffImm) {
87 return SelectAddrModeIndexed7S(N, 4, Base, OffImm);
89 bool SelectAddrModeIndexed7S64(SDValue N, SDValue &Base, SDValue &OffImm) {
90 return SelectAddrModeIndexed7S(N, 8, Base, OffImm);
92 bool SelectAddrModeIndexed7S128(SDValue N, SDValue &Base, SDValue &OffImm) {
93 return SelectAddrModeIndexed7S(N, 16, Base, OffImm);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64InstructionSelector.cpp 5563 MachineOperand &OffImm = RootDef->getOperand(2);
5564 if (!OffImm.isReg())
5566 MachineInstr *RHS = MRI.getVRegDef(OffImm.getReg());

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