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    Searched refs:OpName (Results 1 - 25 of 57) sorted by relevancy

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  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIPeepholeSDWA.cpp 308 if (TII->getNamedOperand(*MI, AMDGPU::OpName::src0) == SrcOp) {
309 if (auto *Mod = TII->getNamedOperand(*MI, AMDGPU::OpName::src0_modifiers)) {
312 } else if (TII->getNamedOperand(*MI, AMDGPU::OpName::src1) == SrcOp) {
313 if (auto *Mod = TII->getNamedOperand(*MI, AMDGPU::OpName::src1_modifiers)) {
343 MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
344 MachineOperand *SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src0_sel);
346 TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers);
350 Src = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
351 SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel);
352 SrcMods = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers)
    [all...]
R600ExpandSpecialInstrs.cpp 86 int DstIdx = TII->getOperandIdx(MI.getOpcode(), R600::OpName::dst);
93 R600::OpName::pred_sel);
95 R600::OpName::pred_sel);
115 TII->setImmOperand(*PredSet, R600::OpName::update_exec_mask, 1);
117 TII->setImmOperand(*PredSet, R600::OpName::update_pred, 1);
147 BMI->getOperand(TII->getOperandIdx(Opcode, R600::OpName::src0))
150 BMI->getOperand(TII->getOperandIdx(Opcode, R600::OpName::src1))
197 MI.getOperand(TII->getOperandIdx(MI, R600::OpName::dst)).getReg();
199 MI.getOperand(TII->getOperandIdx(MI, R600::OpName::src0)).getReg();
204 int Src1Idx = TII->getOperandIdx(MI, R600::OpName::src1)
    [all...]
R600InstrInfo.cpp 67 NewMI->getOperand(getOperandIdx(*NewMI, R600::OpName::src0))
133 return isLDSInstr(Opcode) && getOperandIdx(Opcode, R600::OpName::dst) != -1;
233 {R600::OpName::src0, R600::OpName::src0_sel},
234 {R600::OpName::src1, R600::OpName::src1_sel},
235 {R600::OpName::src2, R600::OpName::src2_sel},
236 {R600::OpName::src0_X, R600::OpName::src0_sel_X}
    [all...]
GCNDPPCombine.cpp 126 if (const auto *SDst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst)) {
135 if (!hasNoImmOrEqual(MI, AMDGPU::OpName::src0_modifiers, 0, Mask) ||
136 !hasNoImmOrEqual(MI, AMDGPU::OpName::src1_modifiers, 0, Mask) ||
137 !hasNoImmOrEqual(MI, AMDGPU::OpName::clamp, 0) ||
138 !hasNoImmOrEqual(MI, AMDGPU::OpName::omod, 0)) {
201 auto *Dst = TII->getNamedOperand(OrigMI, AMDGPU::OpName::vdst);
206 const int OldIdx = AMDGPU::getNamedOperandIdx(DPPOp, AMDGPU::OpName::old);
212 TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst)->getReg()),
227 AMDGPU::OpName::src0_modifiers)) {
229 AMDGPU::OpName::src0_modifiers))
    [all...]
R600ClauseMergePass.cpp 78 .getOperand(TII->getOperandIdx(MI.getOpcode(), R600::OpName::COUNT))
85 .getOperand(TII->getOperandIdx(MI.getOpcode(), R600::OpName::Enabled))
91 int CntIdx = TII->getOperandIdx(R600::CF_ALU, R600::OpName::COUNT);
110 int CntIdx = TII->getOperandIdx(R600::CF_ALU, R600::OpName::COUNT);
122 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_MODE0);
124 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_BANK0);
126 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_ADDR0);
138 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_MODE1);
140 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_BANK1);
142 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_ADDR1)
    [all...]
SILoadStoreOptimizer.cpp 292 TII.getNamedOperand(MI, AMDGPU::OpName::dmask)->getImm();
343 if (AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr) == -1 &&
344 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0) == -1)
441 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0);
443 int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc);
517 DMask = TII.getNamedOperand(*I, AMDGPU::OpName::dmask)->getImm();
521 int OffsetIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::offset);
526 Format = TII.getNamedOperand(*I, AMDGPU::OpName::format)->getImm();
533 CPol = TII.getNamedOperand(*I, AMDGPU::OpName::cpol)->getImm();
541 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0) + J
    [all...]
AMDGPUMacroFusion.cpp 47 AMDGPU::OpName::src2);
R600Packetizer.cpp 81 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write);
84 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst);
126 R600::OpName::src0,
127 R600::OpName::src1,
128 R600::OpName::src2
182 int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel),
183 OpJ = TII->getOperandIdx(MIJ->getOpcode(), R600::OpName::pred_sel);
217 unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), R600::OpName::last);
298 R600::OpName::bank_swizzle);
302 TII->getOperandIdx(MI.getOpcode(), R600::OpName::bank_swizzle)
    [all...]
SIFoldOperands.cpp 162 int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
183 AMDGPU::OpName::vaddr);
188 AMDGPU::OpName::saddr);
193 AMDGPU::OpName::vaddr);
219 if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0))
220 ModIdx = AMDGPU::OpName::src0_modifiers;
221 else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1))
222 ModIdx = AMDGPU::OpName::src1_modifiers;
223 else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2))
224 ModIdx = AMDGPU::OpName::src2_modifiers
    [all...]
SIInstrInfo.cpp 83 static bool nodesHaveSameOperandValue(SDNode *N0, SDNode* N1, unsigned OpName) {
87 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName);
88 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName);
155 int Offset0Idx = AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::offset);
156 int Offset1Idx = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::offset);
173 if (AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::sbase) == -1 ||
174 AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::sbase) == -1)
200 if (!nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::soffset) ||
201 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::vaddr) ||
202 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc)
    [all...]
SIOptimizeExecMaskingPreRA.cpp 155 MachineOperand *Op1 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src0);
156 MachineOperand *Op2 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src1);
167 if (TII->hasModifiersSet(*Sel, AMDGPU::OpName::src0_modifiers) ||
168 TII->hasModifiersSet(*Sel, AMDGPU::OpName::src1_modifiers))
171 Op1 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src0);
172 Op2 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src1);
173 MachineOperand *CC = TII->getNamedOperand(*Sel, AMDGPU::OpName::src2);
R600ISelLowering.cpp 276 int DstIdx = TII->getOperandIdx(MI.getOpcode(), R600::OpName::dst);
336 int Idx = TII->getOperandIdx(*MIB, R600::OpName::literal);
345 TII->setImmOperand(*NewMI, R600::OpName::src0_sel,
2003 bool HasDst = TII->getOperandIdx(Opcode, R600::OpName::dst) > -1;
2014 TII->getOperandIdx(Opcode, R600::OpName::src0),
2015 TII->getOperandIdx(Opcode, R600::OpName::src1),
2016 TII->getOperandIdx(Opcode, R600::OpName::src2),
2017 TII->getOperandIdx(Opcode, R600::OpName::src0_X),
2018 TII->getOperandIdx(Opcode, R600::OpName::src0_Y),
2019 TII->getOperandIdx(Opcode, R600::OpName::src0_Z)
    [all...]
R600Defines.h 62 namespace OpName {
SIRegisterInfo.cpp 637 AMDGPU::OpName::offset);
647 AMDGPU::OpName::vaddr) ||
649 AMDGPU::OpName::saddr))) &&
739 TII->getNamedOperand(MI, IsFlat ? AMDGPU::OpName::saddr
740 : AMDGPU::OpName::vaddr);
742 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset);
758 MachineOperand *SOffset = TII->getNamedOperand(MI, AMDGPU::OpName::soffset);
964 const MachineOperand *Reg = TII->getNamedOperand(*MI, AMDGPU::OpName::vdata);
971 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc))
972 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::soffset)
    [all...]
GCNHazardRecognizer.cpp 127 AMDGPU::OpName::gds);
143 AMDGPU::OpName::simm16);
717 int VDataIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdata);
730 TII->getNamedOperand(MI, AMDGPU::OpName::soffset);
743 int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::srsrc);
750 int DataIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdata);
831 TII->getNamedOperand(*RWLane, AMDGPU::OpName::src1);
896 auto *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0);
964 SDSTName = AMDGPU::OpName::vdst;
967 SDSTName = AMDGPU::OpName::sdst
    [all...]
SIInsertWaitcnts.cpp 525 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::addr);
534 AMDGPU::OpName::data0) != -1) {
537 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data0),
541 AMDGPU::OpName::data1) != -1) {
544 AMDGPU::OpName::data1),
568 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data),
573 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data),
582 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data),
595 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data),
626 MachineOperand *MO = TII->getNamedOperand(Inst, AMDGPU::OpName::data)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp 296 uint16_t DataNameIdx = (TSFlags & SIInstrFlags::DS) ? AMDGPU::OpName::data0
297 : AMDGPU::OpName::vdata;
301 int DstIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst);
307 int Data2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data1);
406 int FiIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::fi);
437 if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::dpp8)
543 AMDGPU::OpName::src2_modifiers);
549 AMDGPU::OpName::cpol);
556 AMDGPU::OpName::cpol);
568 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::tfe)
    [all...]
  /src/external/apache2/llvm/dist/clang/lib/Tooling/Transformer/
Parsing.cpp 252 std::string OpName = std::move(Id->Value);
253 if (auto Op = findOptional(getUnaryStringSelectors(), OpName))
256 if (auto Op = findOptional(getUnaryRangeSelectors(), OpName))
259 if (auto Op = findOptional(getBinaryStringSelectors(), OpName))
262 if (auto Op = findOptional(getBinaryRangeSelectors(), OpName))
265 return makeParseError(State, "unknown selector name: " + OpName);
Stencil.cpp 120 StringRef OpName;
123 OpName = "expression";
126 OpName = "deref";
129 OpName = "maybeDeref";
132 OpName = "addressOf";
135 OpName = "maybeAddressOf";
138 OpName = "describe";
141 return (OpName + "(\"" + Data.Id + "\")").str();
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblySetP2AlignOperands.cpp 88 MI.getOpcode(), WebAssembly::OpName::p2align);
WebAssemblyRegisterInfo.cpp 74 MI.getOpcode(), WebAssembly::OpName::addr);
77 MI.getOpcode(), WebAssembly::OpName::off);
  /src/sys/external/bsd/acpica/dist/compiler/
asloffset.c 62 char *OpName,
336 * OpName - Name of the AML opcode
353 char *OpName,
385 Offset, ACPI_FORMAT_UINT64 (Value), OpName);
  /src/external/apache2/llvm/dist/clang/lib/AST/
DeclarationName.cpp 177 const char *OpName = getOperatorSpelling(getCXXOverloadedOperator());
178 assert(OpName && "not an overloaded operator");
181 if (OpName[0] >= 'a' && OpName[0] <= 'z')
183 OS << OpName;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 3071 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::dst_sel);
3248 if (AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::imm) != -1) {
3259 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
3260 const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
3261 const int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
3327 const int DstIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdst);
3335 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
3336 const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
3337 const int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
3368 int ClampIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::clamp)
    [all...]
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenInstruction.cpp 185 StringRef OpName = Op.substr(1);
189 StringRef::size_type DotIdx = OpName.find_first_of('.');
191 SubOpName = OpName.substr(DotIdx+1);
196 OpName = OpName.substr(0, DotIdx);
199 unsigned OpIdx = getOperandNamed(OpName);
346 StringRef OpName;
347 std::tie(OpName, DisableEncoding) = getToken(DisableEncoding, " ,\t");
348 if (OpName.empty()) break;
351 std::pair<unsigned,unsigned> Op = ParseOperandName(OpName, false)
    [all...]

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