| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZInstPrinter.cpp | 78 static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) { 79 int64_t Value = MI->getOperand(OpNum).getImm(); 85 static void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) { 86 int64_t Value = MI->getOperand(OpNum).getImm(); 91 void SystemZInstPrinter::printU1ImmOperand(const MCInst *MI, int OpNum, 93 printUImmOperand<1>(MI, OpNum, O); 96 void SystemZInstPrinter::printU2ImmOperand(const MCInst *MI, int OpNum, 98 printUImmOperand<2>(MI, OpNum, O); 101 void SystemZInstPrinter::printU3ImmOperand(const MCInst *MI, int OpNum, 103 printUImmOperand<3>(MI, OpNum, O) [all...] |
| SystemZInstPrinter.h | 56 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O); 57 void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum, 59 printOperand(MI, OpNum, O); 61 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 62 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 63 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 64 void printBDRAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 65 void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 66 void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 67 void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) [all...] |
| SystemZMCCodeEmitter.cpp | 67 uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum, 70 uint64_t getBDAddr20Encoding(const MCInst &MI, unsigned OpNum, 73 uint64_t getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum, 76 uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum, 79 uint64_t getBDLAddr12Len4Encoding(const MCInst &MI, unsigned OpNum, 82 uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum, 85 uint64_t getBDRAddr12Encoding(const MCInst &MI, unsigned OpNum, 88 uint64_t getBDVAddr12Encoding(const MCInst &MI, unsigned OpNum, 92 // Operand OpNum of MI needs a PC-relative fixup of kind Kind at 95 // is always 0. If AllowTLS is true and optional operand OpNum + [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/ |
| VEInstPrinter.cpp | 55 void VEInstPrinter::printOperand(const MCInst *MI, int OpNum, 57 const MCOperand &MO = MI->getOperand(OpNum); 78 void VEInstPrinter::printMemASXOperand(const MCInst *MI, int OpNum, 83 printOperand(MI, OpNum, STI, O); 85 printOperand(MI, OpNum + 1, STI, O); 89 if (MI->getOperand(OpNum + 2).isImm() && 90 MI->getOperand(OpNum + 2).getImm() == 0) { 93 printOperand(MI, OpNum + 2, STI, O); 95 if (MI->getOperand(OpNum + 1).isImm() && 96 MI->getOperand(OpNum + 1).getImm() == 0 & [all...] |
| VEInstPrinter.h | 40 void printOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, 42 void printMemASXOperand(const MCInst *MI, int OpNum, 45 void printMemASOperandASX(const MCInst *MI, int OpNum, 48 void printMemASOperandRRM(const MCInst *MI, int OpNum, 51 void printMemASOperandHM(const MCInst *MI, int OpNum, 54 void printMImmOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, 56 void printCCOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, 58 void printRDOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI,
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| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMInstPrinter.h | 47 void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum, 49 printOperand(MI, OpNum, STI, O); 52 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, 54 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, 57 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, 59 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, 61 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, 63 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, 65 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum, 67 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum, [all...] |
| ARMInstPrinter.cpp | 351 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, 354 const MCOperand &MO1 = MI->getOperand(OpNum); 381 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, 384 const MCOperand &MO1 = MI->getOperand(OpNum); 385 const MCOperand &MO2 = MI->getOperand(OpNum + 1); 386 const MCOperand &MO3 = MI->getOperand(OpNum + 2); 401 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, 404 const MCOperand &MO1 = MI->getOperand(OpNum); 405 const MCOperand &MO2 = MI->getOperand(OpNum + 1); 491 unsigned OpNum, [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64InstPrinter.h | 76 void printAddSubImm(const MCInst *MI, unsigned OpNum, 79 void printLogicalImm(const MCInst *MI, unsigned OpNum, 81 void printShifter(const MCInst *MI, unsigned OpNum, 83 void printShiftedRegister(const MCInst *MI, unsigned OpNum, 85 void printExtendedRegister(const MCInst *MI, unsigned OpNum, 87 void printArithExtend(const MCInst *MI, unsigned OpNum, 90 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O, 93 void printMemExtend(const MCInst *MI, unsigned OpNum, 95 printMemExtend(MI, OpNum, O, SrcRegKind, Width); 98 void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum, [all...] |
| AArch64InstPrinter.cpp | 734 int OpNum = LdStDesc->ListOperand; 735 printVectorList(MI, OpNum++, STI, O, ""); 738 O << '[' << MI->getOperand(OpNum++).getImm() << ']'; 741 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); 746 unsigned Reg = MI->getOperand(OpNum++).getReg(); 947 void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum, 950 const MCOperand &MO = MI->getOperand(OpNum); 955 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm()); 958 printShifter(MI, OpNum + 1, STI, O); 965 printShifter(MI, OpNum + 1, STI, O) [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/MCTargetDesc/ |
| ARCInstPrinter.h | 38 void printMemOperandRI(const MCInst *MI, unsigned OpNum, raw_ostream &O); 39 void printOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 40 void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum, 42 printOperand(MI, OpNum, O); 44 void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 45 void printBRCCPredicateOperand(const MCInst *MI, unsigned OpNum,
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| ARCInstPrinter.cpp | 140 void ARCInstPrinter::printOperand(const MCInst *MI, unsigned OpNum, 142 const MCOperand &Op = MI->getOperand(OpNum); 157 void ARCInstPrinter::printMemOperandRI(const MCInst *MI, unsigned OpNum, 159 const MCOperand &base = MI->getOperand(OpNum); 160 const MCOperand &offset = MI->getOperand(OpNum + 1); 167 void ARCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum, 170 const MCOperand &Op = MI->getOperand(OpNum); 175 void ARCInstPrinter::printBRCCPredicateOperand(const MCInst *MI, unsigned OpNum, 177 const MCOperand &Op = MI->getOperand(OpNum);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/MCTargetDesc/ |
| NVPTXInstPrinter.h | 38 void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, 40 void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, 42 void printLdStCode(const MCInst *MI, int OpNum, 44 void printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O, 46 void printMemOperand(const MCInst *MI, int OpNum, 48 void printProtoIdent(const MCInst *MI, int OpNum,
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| NVPTXInstPrinter.cpp | 98 void NVPTXInstPrinter::printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, 100 const MCOperand &MO = MI->getOperand(OpNum); 148 void NVPTXInstPrinter::printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, 150 const MCOperand &MO = MI->getOperand(OpNum); 221 void NVPTXInstPrinter::printLdStCode(const MCInst *MI, int OpNum, 224 const MCOperand &MO = MI->getOperand(OpNum); 273 void NVPTXInstPrinter::printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O, 275 const MCOperand &MO = MI->getOperand(OpNum); 287 void NVPTXInstPrinter::printMemOperand(const MCInst *MI, int OpNum, 289 printOperand(MI, OpNum, O) [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRAsmPrinter.cpp | 49 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 52 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, 88 bool AVRAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 92 bool Error = AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O); 99 const MachineOperand &RegOp = MI->getOperand(OpNum); 107 unsigned OpFlags = MI->getOperand(OpNum - 1).getImm(); 121 Reg = MI->getOperand(OpNum + RegIdx).getReg(); 134 printOperand(MI, OpNum, O); 140 unsigned OpNum, const char *ExtraCode, 146 const MachineOperand &MO = MI->getOperand(OpNum); [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430AsmPrinter.cpp | 52 void printOperand(const MachineInstr *MI, int OpNum, 54 void printSrcMemOperand(const MachineInstr *MI, int OpNum, 78 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 80 const MachineOperand &MO = MI->getOperand(OpNum); 107 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, 109 const MachineOperand &Base = MI->getOperand(OpNum); 110 const MachineOperand &Disp = MI->getOperand(OpNum+1); 117 printOperand(MI, OpNum+1, O, "nohash"); 122 printOperand(MI, OpNum, O);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFAsmPrinter.cpp | 45 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O); 48 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, 72 void BPFAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 74 const MachineOperand &MO = MI->getOperand(OpNum); 120 unsigned OpNum, const char *ExtraCode, 122 assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands"); 123 const MachineOperand &BaseMO = MI->getOperand(OpNum); 124 const MachineOperand &OffsetMO = MI->getOperand(OpNum + 1);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonRDFOpt.cpp | 96 void removeOperand(NodeAddr<InstrNode*> IA, unsigned OpNum); 189 void HexagonDCE::removeOperand(NodeAddr<InstrNode*> IA, unsigned OpNum) { 204 MI->RemoveOperand(OpNum); 208 if (N < OpNum) 210 else if (N > OpNum) 224 unsigned OpNum, NewOpc; 228 OpNum = 1; 232 OpNum = 1; 236 OpNum = 1; 240 OpNum = 0 [all...] |
| HexagonSubtarget.cpp | 421 for (unsigned OpNum = 0; OpNum < DDst->getNumOperands(); OpNum++) { 422 const MachineOperand &MO = DDst->getOperand(OpNum); 424 UseIdx = OpNum; 496 for (unsigned OpNum = 0; OpNum < SrcI->getNumOperands(); OpNum++) { 497 const MachineOperand &MO = SrcI->getOperand(OpNum); 507 DefIdx = OpNum; [all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 48 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; }
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| /src/external/apache2/llvm/dist/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | 2671 unsigned OpNum = 0; 2675 PointeeType = getTypeByID(Record[OpNum++]); 2680 uint64_t Op = Record[OpNum++]; 2688 while (OpNum != Record.size()) { 2690 Elt0FullTy = getFullyStructuredTypeByID(Record[OpNum]); 2691 Type *ElTy = getTypeByID(Record[OpNum++]); 2694 Elts.push_back(ValueList.getConstantFwdRef(Record[OpNum++], ElTy)); 3487 unsigned OpNum = 0; 3488 Type *FullTy = getFullyStructuredTypeByID(Record[OpNum++]); 3501 AddrSpace = Record[OpNum++] [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| DetectDeadLanes.cpp | 85 /// Given a mask \p DefinedLanes of lanes defined at operand \p OpNum 88 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum, 169 unsigned OpNum = MI.getOperandNo(&MO); 170 DstSubIdx = MI.getOperand(OpNum+1).getImm(); 229 unsigned OpNum = MI.getOperandNo(&MO); 238 assert(OpNum % 2 == 1); 239 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); 246 if (OpNum == 2) 258 assert(OpNum == 1); 262 assert(OpNum == 1) [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.h | 76 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O); 79 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 81 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86InstrFoldTables.h | 89 // operand OpNum. 90 const X86MemoryFoldTableEntry *lookupFoldTable(unsigned RegOp, unsigned OpNum);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kAsmPrinter.cpp | 37 void M68kAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 39 const MachineOperand &MO = MI->getOperand(OpNum);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsInstPrinter.h | 97 void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum, 99 printOperand(MI, OpNum, O); 102 void printUImm(const MCInst *MI, int opNum, raw_ostream &O); 103 void printMemOperand(const MCInst *MI, int opNum, raw_ostream &O); 104 void printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O); 105 void printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O); 106 void printSHFMask(const MCInst *MI, int opNum, raw_ostream &O); 114 void printRegisterList(const MCInst *MI, int opNum, raw_ostream &O);
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