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    Searched refs:OpR (Results 1 - 5 of 5) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
InstrInfoEmitter.cpp 140 auto *OpR = cast<DefInit>(MIOI->getArg(j))->getDef();
141 OperandList.back().Rec = OpR;
146 Record *OpR = OperandList[j].Rec;
149 if (OpR->isSubClassOf("RegisterOperand"))
150 OpR = OpR->getValueAsDef("RegClass");
151 if (OpR->isSubClassOf("RegisterClass"))
152 Res += getQualifiedName(OpR) + "RegClassID, ";
153 else if (OpR->isSubClassOf("PointerLikeRegClass"))
154 Res += utostr(OpR->getValueAsInt("RegClassKind")) + ", "
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
FunctionComparator.cpp 806 Value *OpR = InstR->getOperand(i);
807 if (int Res = cmpValues(OpL, OpR))
810 assert(cmpTypes(OpL->getType(), OpR->getType()) == 0);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonVLIWPacketizer.cpp 1387 const MachineOperand &OpR = secondRegMatch ? NOp0 : NOp1;
1388 if (OpR.isReg() && PI->modifiesRegister(OpR.getReg(), HRI)) {
  /src/external/apache2/llvm/dist/llvm/include/llvm/IR/
PatternMatch.h 2336 Value *OpL = nullptr, *OpR = nullptr;
2349 auto RHS = m_LShr(m_Neg(m_Value(OpR)), m_SpecificInt(ShiftWidth));
2352 return Signum.match(V) && OpL == OpR && Val.match(OpL);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeIntegerTypes.cpp 1598 SDValue OpR = GetPromotedInteger(NewRHS);
1601 // If the width of OpL/OpR excluding the duplicated sign bits is no greater
1607 OpR.getScalarValueSizeInBits() - DAG.ComputeNumSignBits(OpR) + 1;
1611 NewRHS = OpR;

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