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    Searched refs:Opc0 (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineVectorOps.cpp 1918 BinaryOperator::BinaryOps Opc0 = B0->getOpcode();
1921 if (ConstantsAreOp1 && Opc0 != Opc1) {
1925 if (Opc0 == Instruction::Shl || Opc1 == Instruction::Shl)
1929 Opc0 = AltB0.Opcode;
1938 if (Opc0 != Opc1)
1942 BinaryOperator::BinaryOps BOpc = Opc0;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIInstrInfo.cpp 84 unsigned Opc0 = N0->getMachineOpcode();
87 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName);
135 unsigned Opc0 = Load0->getMachineOpcode();
139 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad())
142 if (isDS(Opc0) && isDS(Opc1)) {
155 int Offset0Idx = AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::offset);
164 Offset0Idx -= get(Opc0).NumDefs;
171 if (isSMRD(Opc0) && isSMRD(Opc1)) {
173 if (AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::sbase) == -1 ||
197 if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1)))
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 25091 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(),
25099 Opc = IntrData->Opc0;
25125 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(),
25133 Opc = IntrData->Opc0;
25169 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(),
25180 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(),
25204 DAG.getNode(IntrData->Opc0, dl, VT, Src), Mask, PassThru,
25215 Opc = IntrData->Opc0;
25246 return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1,
25254 unsigned Opc = IntrData->Opc0;
    [all...]
X86IntrinsicsInfo.h 46 uint16_t Opc0;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 6074 unsigned Opc0 = N0.getOpcode();
6075 if (Opc0 != ISD::AND && Opc0 != ISD::SHL && Opc0 != ISD::SRL)
6082 else if (Opc0 == ISD::AND)
6096 if (Opc == ISD::SRL || (Opc == ISD::AND && Opc0 == ISD::SHL)) {
6110 if (Opc0 != ISD::SRL)
6118 if (Opc0 != ISD::SHL)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 11960 unsigned Opc0 = Op0.getOpcode();
11962 if (Opc0 != Op1.getOpcode() ||
11963 (Opc0 != ISD::ZERO_EXTEND && Opc0 != ISD::SIGN_EXTEND))
11981 (Opc0 == ISD::SIGN_EXTEND) ? AArch64ISD::SABD : AArch64ISD::UABD;

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