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    Searched refs:Opnd (Results 1 - 13 of 13) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/MC/
MCInstPrinter.cpp 90 const MCOperand &Opnd = MI.getOperand(OpIdx);
97 return Opnd.isImm() && Opnd.getImm() == int32_t(C.Value);
100 return Opnd.isReg() && Opnd.getReg() == C.Value;
103 return Opnd.isReg() && Opnd.getReg() == MI.getOperand(C.Value).getReg();
106 return Opnd.isReg() && MRI.getRegClass(C.Value).contains(Opnd.getReg());
109 return M.ValidateMCOperand(Opnd, *STI, C.Value)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/ObjCARC/
ObjCARC.h 67 const auto *Opnd = Inst.getOperand(0)->stripPointerCasts();
68 if (const auto *C = dyn_cast<CallInst>(Opnd))
70 return dyn_cast<InvokeInst>(Opnd);
ObjCARCOpts.cpp 920 for (Value *Opnd : PN->incoming_values())
921 if (!isInertARCValue(Opnd, VisitedPhis))
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
ConstantHoisting.cpp 175 Value *Opnd = Inst->getOperand(Idx);
176 if (auto CastInst = dyn_cast<Instruction>(Opnd))
448 Value *Opnd = Inst->getOperand(Idx);
451 if (auto ConstInt = dyn_cast<ConstantInt>(Opnd)) {
457 if (auto CastInst = dyn_cast<Instruction>(Opnd)) {
472 if (auto ConstExpr = dyn_cast<ConstantExpr>(Opnd)) {
779 Value *Opnd = ConstUser.Inst->getOperand(ConstUser.OpndIdx);
782 if (isa<ConstantInt>(Opnd)) {
791 if (auto CastInst = dyn_cast<Instruction>(Opnd)) {
813 if (auto ConstExpr = dyn_cast<ConstantExpr>(Opnd)) {
    [all...]
Reassociate.cpp 1280 static Value *createAndInstr(Instruction *InsertBefore, Value *Opnd,
1286 return Opnd;
1289 Opnd, ConstantInt::get(Opnd->getType(), ConstOpnd), "and.ra",
  /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
BPFMISimplifyPatchable.cpp 133 const MachineOperand &Opnd = DefInst->getOperand(0);
134 if (Opnd.isReg() && Opnd.getReg() == I->getReg())
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
CodeGenPrepare.cpp 1957 // i64 shift.result = lshr i64 opnd, imm
2762 /// Build a truncate instruction of \p Opnd producing a \p Ty
2764 /// trunc Opnd to Ty.
2765 TruncBuilder(Instruction *Opnd, Type *Ty) : TypePromotionAction(Opnd) {
2766 IRBuilder<> Builder(Opnd);
2768 Val = Builder.CreateTrunc(Opnd, Ty, "promoted");
2788 /// Build a sign extension instruction of \p Opnd producing a \p Ty
2790 /// sext Opnd to Ty.
2791 SExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineAddSub.cpp 625 for (const FAddend *Opnd : Opnds) {
627 Value *V = createAddendVal(*Opnd, NeedNeg);
708 for (const FAddend *Opnd : Opnds) {
709 if (Opnd->isConstant())
714 if (isa<UndefValue>(Opnd->getSymVal()))
717 const FAddendCoef &CE = Opnd->getCoef();
738 Value *FAddCombine::createAddendVal(const FAddend &Opnd, bool &NeedNeg) {
739 const FAddendCoef &Coeff = Opnd.getCoef();
741 if (Opnd.isConstant()) {
746 Value *OpndVal = Opnd.getSymVal()
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 2003 MCOperand Opnd;
2016 Opnd = Inst.getOperand(1);
2017 if (!Opnd.isImm())
2019 Imm = Opnd.getImm();
2033 Opnd = Inst.getOperand(2);
2034 if (!Opnd.isImm())
2036 Imm = Opnd.getImm();
2201 MCOperand Opnd;
2208 Opnd = Inst.getOperand(0);
2209 if (!Opnd.isImm()
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp 53 addOperand(MCInst &Inst, const MCOperand& Opnd) {
54 Inst.addOperand(Opnd);
55 return Opnd.isValid() ?
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86FastISel.cpp 2360 const Value *Opnd = nullptr;
2363 case CmpInst::FCMP_FALSE: Opnd = I->getOperand(2); break;
2364 case CmpInst::FCMP_TRUE: Opnd = I->getOperand(1); break;
2367 if (Opnd) {
2368 Register OpReg = getRegForValue(Opnd);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 1327 SDValue Opnd = Op->getOperand(++OpNo), In64;
1329 if (Opnd.getValueType() == MVT::i64)
1330 In64 = initAccumulator(Opnd, DL, DAG);
1332 Ops.push_back(Opnd);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 2016 for (auto &Opnd : MI->uses()) {
2017 if (Opnd.isReg()) {
2018 Reg = Opnd.getReg();

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