| /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| InstCombineAtomicRMW.cpp | 22 /// ordering effects on nearby instructions, or be volatile.
114 AtomicOrdering Ordering = RMWI.getOrdering();
115 assert(Ordering != AtomicOrdering::NotAtomic &&
116 Ordering != AtomicOrdering::Unordered &&
120 // ordering is compatible.
123 if (Ordering != AtomicOrdering::Release &&
124 Ordering != AtomicOrdering::Monotonic)
128 SI->setAtomic(Ordering, RMWI.getSyncScopeID());
150 // Check if the required ordering is compatible with an atomic load.
151 if (Ordering != AtomicOrdering::Acquire &
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/ |
| GlobalStatus.h | 71 /// Set to the strongest atomic ordering requirement.
72 AtomicOrdering Ordering = AtomicOrdering::NotAtomic;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVExpandAtomicPseudoInsts.cpp | 132 static unsigned getLRForRMW32(AtomicOrdering Ordering) {
133 switch (Ordering) {
149 static unsigned getSCForRMW32(AtomicOrdering Ordering) {
150 switch (Ordering) {
166 static unsigned getLRForRMW64(AtomicOrdering Ordering) {
167 switch (Ordering) {
183 static unsigned getSCForRMW64(AtomicOrdering Ordering) {
184 switch (Ordering) {
200 static unsigned getLRForRMW(AtomicOrdering Ordering, int Width) {
202 return getLRForRMW32(Ordering);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| GlobalStatus.cpp | 30 /// Return the stronger of the two ordering. If the two orderings are acquire
92 GS.Ordering = strongerOrdering(GS.Ordering, LI->getOrdering());
102 GS.Ordering = strongerOrdering(GS.Ordering, SI->getOrdering());
|
| /src/external/bsd/zstd/dist/contrib/pzstd/utils/test/ |
| ThreadPoolTest.cpp | 19 TEST(ThreadPool, Ordering) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| SIMemoryLegalizer.cpp | 92 AtomicOrdering Ordering = AtomicOrdering::NotAtomic;
101 SIMemOpInfo(AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent,
110 : Ordering(Ordering), FailureOrdering(FailureOrdering),
117 if (Ordering == AtomicOrdering::NotAtomic) {
130 !isStrongerThan(FailureOrdering, Ordering));
132 // There is also no cross address space ordering if the ordering
162 /// \returns Ordering constraint of the machine instruction used to
165 return Ordering;
[all...] |
| AMDGPUTargetTransformInfo.cpp | 492 auto *Ordering = dyn_cast<ConstantInt>(Inst->getArgOperand(2));
494 if (!Ordering || !Volatile)
497 unsigned OrderingVal = Ordering->getZExtValue();
502 Info.Ordering = static_cast<AtomicOrdering>(OrderingVal);
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| MachineMemOperand.h | 162 /// Atomic ordering requirements for this memory operation. For cmpxchg
163 /// atomic operations, atomic ordering requirements when store occurs.
164 unsigned Ordering : 4; // enum AtomicOrdering
165 /// For cmpxchg atomic operations, atomic ordering requirements when store
181 /// and atomic ordering requirements must also be specified. For cmpxchg
182 /// atomic operations the atomic ordering requirements when store does not
188 AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
245 /// Return the atomic ordering requirements for this memory operation. For
246 /// cmpxchg atomic operations, return the atomic ordering requirements when
249 return static_cast<AtomicOrdering>(AtomicInfo.Ordering);
[all...] |
| DbgEntityHistoryCalculator.h | 27 /// Record instruction ordering so we can query their relative positions within
119 const InstructionOrdering &Ordering);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| LegalityPredicates.cpp | 191 unsigned MMOIdx, AtomicOrdering Ordering) {
193 return isAtLeastOrStrongerThan(Query.MMODescrs[MMOIdx].Ordering, Ordering);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
| DbgEntityHistoryCalculator.cpp | 117 const InstructionOrdering &Ordering) {
120 if (EndMI && Ordering.isBefore(EndMI, RangesI->first))
122 if (EndMI && !Ordering.isBefore(RangesI->second, EndMI))
124 if (Ordering.isBefore(StartMI, RangesI->second))
132 const InstructionOrdering &Ordering) {
204 if (auto R = intersects(StartMI, EndMI, ScopeRanges, Ordering)) {
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| InstructionSelectorImpl.h | 383 AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
386 << InsnID << "], " << (uint64_t)Ordering << ")\n");
393 if (MMO->getOrdering() != Ordering)
400 AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
404 << InsnID << "], " << (uint64_t)Ordering << ")\n");
411 if (!isAtLeastOrStrongerThan(MMO->getOrdering(), Ordering))
418 AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
422 << InsnID << "], " << (uint64_t)Ordering << ")\n");
429 if (!isStrongerThan(Ordering, MMO->getOrdering()))
|
| LegalizerInfo.h | 131 AtomicOrdering Ordering;
299 /// True iff the specified MMO index has at an atomic ordering of at Ordering or
302 AtomicOrdering Ordering);
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| Instructions.h | 230 /// Returns the ordering constraint of this load instruction.
234 /// Sets the ordering constraint of this load instruction. May not be Release
236 void setOrdering(AtomicOrdering Ordering) {
237 setSubclassData<OrderingField>(Ordering);
250 /// Sets the ordering constraint and the synchronization scope ID of this load
252 void setAtomic(AtomicOrdering Ordering,
254 setOrdering(Ordering);
361 /// Returns the ordering constraint of this store instruction.
366 /// Sets the ordering constraint of this store instruction. May not be
368 void setOrdering(AtomicOrdering Ordering) {
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| CGBuilder.h | 144 llvm::Value *Val, llvm::AtomicOrdering Ordering,
147 Ordering, SSID);
|
| TargetInfo.h | 294 llvm::AtomicOrdering Ordering,
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| MachineOperand.cpp | 1021 AtomicOrdering Ordering,
1032 AtomicInfo.Ordering = static_cast<unsigned>(Ordering);
1033 assert(getOrdering() == Ordering && "Value truncated");
|
| AtomicExpandPass.cpp | 111 Value *CASExpected, AtomicOrdering Ordering,
1043 // Given: atomicrmw some_op iN* %addr, iN %incr ordering
1132 // should preserve the ordering.
1240 // If the cmpxchg doesn't actually need any ordering when it fails, we can
1272 // If the cmpxchg doesn't actually need any ordering when it fails, we can
1404 // Given: atomicrmw some_op iN* %addr, iN %incr ordering
1655 Value *ValueOperand, Value *CASExpected, AtomicOrdering Ordering,
1673 assert(Ordering != AtomicOrdering::NotAtomic && "expect atomic MO");
1675 ConstantInt::get(Type::getInt32Ty(Ctx), (int)toCABI(Ordering));
1709 // iN __atomic_load_N(iN *ptr, int ordering)
[all...] |
| MachineFunction.cpp | 292 /// ordering of the blocks within the function. If a specific MachineBasicBlock
433 SyncScope::ID SSID, AtomicOrdering Ordering,
437 SSID, Ordering, FailureOrdering);
852 // re-ordering filters and/or their elements - probably not worth it.
|
| /src/external/apache2/llvm/dist/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | 5006 // LOADATOMIC: [opty, op, align, vol, ordering, ssid]
5026 AtomicOrdering Ordering = getDecodedOrdering(Record[OpNum + 2]);
5027 if (Ordering == AtomicOrdering::NotAtomic ||
5028 Ordering == AtomicOrdering::Release ||
5029 Ordering == AtomicOrdering::AcquireRelease)
5031 if (Ordering != AtomicOrdering::NotAtomic && Record[OpNum] == 0)
5040 I = new LoadInst(Ty, Op, "", Record[OpNum + 1], *Align, Ordering, SSID);
5073 // STOREATOMIC: [ptrty, ptr, val, align, vol, ordering, ssid]
5088 AtomicOrdering Ordering = getDecodedOrdering(Record[OpNum + 2]);
5089 if (Ordering == AtomicOrdering::NotAtomic |
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/AsmParser/ |
| LLParser.cpp | 2426 /// This sets Scope and Ordering to the parsed values.
2428 AtomicOrdering &Ordering) {
2432 return parseScope(SSID) || parseOrdering(Ordering);
2464 /// This sets Ordering to the parsed value.
2465 bool LLParser::parseOrdering(AtomicOrdering &Ordering) {
2468 return tokError("Expected ordering on atomic instruction");
2469 case lltok::kw_unordered: Ordering = AtomicOrdering::Unordered; break;
2470 case lltok::kw_monotonic: Ordering = AtomicOrdering::Monotonic; break;
2472 // case lltok::kw_consume: Ordering = AtomicOrdering::Consume; break;
2473 case lltok::kw_acquire: Ordering = AtomicOrdering::Acquire; break
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| GlobalOpt.cpp | 1046 AtomicOrdering Ordering,
1094 AtomicOrdering Ordering, const DataLayout &DL,
1119 Ordering, DL, TLI))
1521 if (GS.Ordering == AtomicOrdering::NotAtomic) {
1572 if (optimizeOnceStoredGlobal(GV, GS.StoredOnceValue, GS.Ordering, DL,
1579 if (GS.Ordering == AtomicOrdering::NotAtomic) {
|
| /src/external/apache2/llvm/dist/llvm/lib/IR/ |
| Core.cpp | 3560 static AtomicOrdering mapFromLLVMOrdering(LLVMAtomicOrdering Ordering) {
3561 switch (Ordering) {
3576 static LLVMAtomicOrdering mapToLLVMOrdering(AtomicOrdering Ordering) {
3577 switch (Ordering) {
3635 LLVMValueRef LLVMBuildFence(LLVMBuilderRef B, LLVMAtomicOrdering Ordering,
3638 unwrap(B)->CreateFence(mapFromLLVMOrdering(Ordering),
3746 void LLVMSetOrdering(LLVMValueRef MemAccessInst, LLVMAtomicOrdering Ordering) {
3748 AtomicOrdering O = mapFromLLVMOrdering(Ordering);
3984 LLVMAtomicOrdering ordering,
3989 mapFromLLVMOrdering(ordering),
[all...] |
| Instructions.cpp | 1592 Align Alignment, AtomicOrdering Ordering,
1597 setOrdering(Ordering);
1608 assert(Ordering != AtomicOrdering::NotAtomic &&
1613 Align Alignment, AtomicOrdering Ordering,
1618 Init(Operation, Ptr, Val, Alignment, Ordering, SSID);
1622 Align Alignment, AtomicOrdering Ordering,
1627 Init(Operation, Ptr, Val, Alignment, Ordering, SSID);
1669 FenceInst::FenceInst(LLVMContext &C, AtomicOrdering Ordering,
1673 setOrdering(Ordering);
1677 FenceInst::FenceInst(LLVMContext &C, AtomicOrdering Ordering,
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/AsmParser/ |
| LLParser.h | 79 "Ordering not defined for this ValID kind yet");
274 AtomicOrdering &Ordering);
276 bool parseOrdering(AtomicOrdering &Ordering);
|
