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    Searched refs:PB0_GLB_OVRD_REG2__BG_PWRON_OVRD_EN_MASK (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_3_0_sh_mask.h 642 #define PB0_GLB_OVRD_REG2__BG_PWRON_OVRD_EN_MASK 0x00000001L
bif_4_1_sh_mask.h 3733 #define PB0_GLB_OVRD_REG2__BG_PWRON_OVRD_EN_MASK 0x1
bif_5_0_sh_mask.h 4183 #define PB0_GLB_OVRD_REG2__BG_PWRON_OVRD_EN_MASK 0x1

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