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    Searched refs:PCH_DPLL (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dpll_mgr.c 388 val = I915_READ(PCH_DPLL(id));
428 I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll);
431 POSTING_READ(PCH_DPLL(id));
439 I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll);
440 POSTING_READ(PCH_DPLL(id));
449 I915_WRITE(PCH_DPLL(id), 0);
450 POSTING_READ(PCH_DPLL(id));
intel_display.c 9396 u32 temp = I915_READ(PCH_DPLL(i));
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 8245 #define PCH_DPLL(pll) _MMIO((pll) == 0 ? _PCH_DPLL_A : _PCH_DPLL_B)

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