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Searched refs:PCIE_INT_CNTL__POWER_STATE_CHG_INT_EN_MASK (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_3_0_sh_mask.h	`6828 #define PCIE_INT_CNTL__POWER_STATE_CHG_INT_EN_MASK 0x00000040L`
bif_4_1_sh_mask.h	`2031 #define PCIE_INT_CNTL__POWER_STATE_CHG_INT_EN_MASK 0x40`
bif_5_0_sh_mask.h	`2597 #define PCIE_INT_CNTL__POWER_STATE_CHG_INT_EN_MASK 0x40`
bif_5_1_sh_mask.h	`2985 #define PCIE_INT_CNTL__POWER_STATE_CHG_INT_EN_MASK 0x40 [all...]`

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