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Searched refs:PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS_MASK (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_3_0_sh_mask.h	`6844 #define PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS_MASK 0x00000040L`
bif_4_1_sh_mask.h	`2047 #define PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS_MASK 0x40`
bif_5_0_sh_mask.h	`2613 #define PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS_MASK 0x40`
bif_5_1_sh_mask.h	`3001 #define PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS_MASK 0x40 [all...]`

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