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Searched refs:PCIE_LANE_1_EQUALIZATION_CNTL__DOWNSTREAM_PORT_TX_PRESET__SHIFT (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_4_1_sh_mask.h	`1606 #define PCIE_LANE_1_EQUALIZATION_CNTL__DOWNSTREAM_PORT_TX_PRESET__SHIFT 0x0`
bif_5_0_sh_mask.h	`1842 #define PCIE_LANE_1_EQUALIZATION_CNTL__DOWNSTREAM_PORT_TX_PRESET__SHIFT 0x0`
bif_5_1_sh_mask.h	`1708 #define PCIE_LANE_1_EQUALIZATION_CNTL__DOWNSTREAM_PORT_TX_PRESET__SHIFT 0x0 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
nbif_6_1_sh_mask.h	`579 #define PCIE_LANE_1_EQUALIZATION_CNTL__DOWNSTREAM_PORT_TX_PRESET__SHIFT 0x0`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
nbio_7_0_sh_mask.h	`3973 #define PCIE_LANE_1_EQUALIZATION_CNTL__DOWNSTREAM_PORT_TX_PRESET__SHIFT 0x0 [all...]`

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