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    Searched refs:PCIE_PWR_BUDGET_DATA__PM_SUB_STATE_MASK (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_4_1_sh_mask.h 1529 #define PCIE_PWR_BUDGET_DATA__PM_SUB_STATE_MASK 0x1c00
bif_5_0_sh_mask.h 1765 #define PCIE_PWR_BUDGET_DATA__PM_SUB_STATE_MASK 0x1c00
bif_5_1_sh_mask.h 1631 #define PCIE_PWR_BUDGET_DATA__PM_SUB_STATE_MASK 0x1c00
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  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
nbio_7_0_sh_mask.h 3882 #define PCIE_PWR_BUDGET_DATA__PM_SUB_STATE_MASK 0x00001C00L
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