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    Searched refs:PCI_MSI_CTL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/arch/arm/cortex/
gic_v2m.c 133 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
135 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
137 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
140 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
145 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
158 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
173 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
175 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
gicv3_its.c 487 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
490 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
493 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
509 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
524 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
526 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
  /src/sys/arch/x86/pci/
msipic.c 353 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
360 pci_conf_write16(pc, tag, off + PCI_MSI_CTL + 2, ctl >> 16);
403 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
439 pci_conf_write16(pc, tag, off + PCI_MSI_CTL + 2, ctl >> 16);
441 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
824 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
827 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
  /src/sys/arch/arm/apple/
apple_pcie.c 476 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
478 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
480 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
483 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
488 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
501 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
516 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
518 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
  /src/sys/dev/pci/
pci.c 618 reg = pci_conf_read(pc, tag, offset + PCI_MSI_CTL);
997 pcs->msi_ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
1078 reg = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
1079 pci_conf_write(pc, tag, off + PCI_MSI_CTL,
1104 pci_conf_write(pc, tag, off + PCI_MSI_CTL, pcs->msi_ctl);
pcireg.h 691 #define PCI_MSI_CTL 0x0 /* Message Control Register offset */

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