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    Searched refs:PCS_MR_CONTROL_RESET (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/mips/cavium/dev/
octeon_gmx.c	1032 SET(ctl_reg, PCS_MR_CONTROL_RESET); 1039 if (!ISSET(ctl_reg, PCS_MR_CONTROL_RESET)) {
octeon_gmxreg.h	658 #define PCS_MR_CONTROL_RESET UINT64_C(0x0000000000008000)

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