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    Searched refs:PHYPLL_PIXEL_RATE_CNTL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_hwseq.c 182 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst],
196 if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst]))
197 REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst],
dce_hwseq.h 69 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, inst)
80 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \
81 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1), \
82 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2), \
83 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 3), \
84 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 4), \
85 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)
346 uint32_t PHYPLL_PIXEL_RATE_CNTL[6];
467 HWS_SF1(blk, PHYPLL_PIXEL_RATE_CNTL, PHYPLL_PIXEL_RATE_SOURCE, mask_sh),\
468 HWS_SF1(blk, PHYPLL_PIXEL_RATE_CNTL, PIXEL_RATE_PLL_SOURCE, mask_sh
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