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Searched refs:PIPE5_PG_STATUS__PIPE5_DESIRED_PWR_STATE__SHIFT (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h	`8270 #define PIPE5_PG_STATUS__PIPE5_DESIRED_PWR_STATE__SHIFT 0x0000001c`
dce_8_0_sh_mask.h	`108 #define PIPE5_PG_STATUS__PIPE5_DESIRED_PWR_STATE__SHIFT 0x1c`
dce_10_0_sh_mask.h	`108 #define PIPE5_PG_STATUS__PIPE5_DESIRED_PWR_STATE__SHIFT 0x1c [all...]`
dce_11_2_sh_mask.h	`108 #define PIPE5_PG_STATUS__PIPE5_DESIRED_PWR_STATE__SHIFT 0x1c [all...]`
dce_12_0_sh_mask.h	`3358 #define PIPE5_PG_STATUS__PIPE5_DESIRED_PWR_STATE__SHIFT 0x1c [all...]`

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