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    Searched refs:PIPE_FIFO_UNDERRUN_STATUS (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_fifo_underrun.c 103 if ((I915_READ(reg) & PIPE_FIFO_UNDERRUN_STATUS) == 0)
107 I915_WRITE(reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS);
126 I915_WRITE(reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS);
129 if (old && I915_READ(reg) & PIPE_FIFO_UNDERRUN_STATUS)
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_irq.c 442 enable_mask &= ~(PIPE_FIFO_UNDERRUN_STATUS |
1294 PIPE_FIFO_UNDERRUN_STATUS);
1325 status_mask = PIPE_FIFO_UNDERRUN_STATUS;
1378 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)
1399 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)
1423 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)
1446 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)
i915_reg.h 5804 #define PIPE_FIFO_UNDERRUN_STATUS (1UL << 31)
  /src/sys/external/bsd/drm/dist/shared-core/
i915_reg.h 1275 #define PIPE_FIFO_UNDERRUN_STATUS (1UL<<31)

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