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    Searched refs:PL011COM_MIS (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/evbarm/dev/
plcomreg.h	168 #define PL011COM_MIS 0x40 /* Masked interrupt status register */
plcom.c	2059 stat = PREAD4(pi, PL011COM_MIS);

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