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Searched
refs:PLL_CNTL__PLL_POWER_DOWN_MASK
(Results
1 - 5
of
5
) sorted by relevancy
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_ci_baco.c
97
{ CMD_READMODIFYWRITE, mmPLL_CNTL,
PLL_CNTL__PLL_POWER_DOWN_MASK
, PLL_CNTL__PLL_POWER_DOWN__SHIFT, 0, 0x1 },
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h
8321
#define
PLL_CNTL__PLL_POWER_DOWN_MASK
0x00000002L
dce_8_0_sh_mask.h
2091
#define
PLL_CNTL__PLL_POWER_DOWN_MASK
0x2
dce_10_0_sh_mask.h
11645
#define
PLL_CNTL__PLL_POWER_DOWN_MASK
0x2
[
all
...]
dce_11_0_sh_mask.h
11457
#define
PLL_CNTL__PLL_POWER_DOWN_MASK
0x2
[
all
...]
Completed in 268 milliseconds
Indexes created Wed Oct 29 09:09:48 GMT 2025