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    Searched refs:PLL_REF_DIV (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_clock_source.h 54 CS_SF(PLL_REF_DIV, PLL_REF_DIV, mask_sh)
133 type PLL_REF_DIV; \
amdgpu_dce_clock_source.c 1347 calc_pll_cs_init_data.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV;
1366 calc_pll_cs_init_data_hdmi.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV;
  /src/sys/dev/pci/
machfbreg.h 303 #define PLL_REF_DIV 0x02
machfb.c 577 sc->ref_div = regrb_pll(sc, PLL_REF_DIV);
945 ref_div = regrb_pll(sc, PLL_REF_DIV);
1032 { 0x02, "PLL_REF_DIV" },

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