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    Searched refs:PMU (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/arch/arm/rockchip/
rk3588_cru.c 47 #define PMU 0x00030000
2571 CLKSEL_CON(PMU, 0), __BITS(15,15), __BITS(14,10),
2572 CLKGATE_CON(PMU, 0), __BIT(3),
2576 CLKSEL_CON(PMU, 1), __BITS(5,5), __BITS(4,0),
2577 CLKGATE_CON(PMU, 0), __BIT(4),
2581 CLKSEL_CON(PMU, 0), __BITS(3,0),
2582 CLKGATE_CON(PMU, 0), __BIT(0),
2586 CLKSEL_CON(PMU, 0), __BITS(6,4),
2587 CLKGATE_CON(PMU, 0), __BIT(1),
2591 CLKSEL_CON(PMU, 0), __BITS(9,7)
    [all...]
  /src/sys/arch/arm/marvell/
dovereg.h 210 #define DOVE_PMU_BASE (DOVE_UNITID2PHYS(PMU)) /* 0xd0000 */
211 #define DOVE_MISC_BASE (DOVE_UNITID2PHYS(PMU) + 0x0200)
212 #define DOVE_GPIO_BASE (DOVE_UNITID2PHYS(PMU) + 0x0400)
213 #define DOVE_PMU_BASE2 (DOVE_UNITID2PHYS(PMU) + 0x8000)
214 #define DOVE_RTC_BASE (DOVE_UNITID2PHYS(PMU) + 0x8500)
215 #define DOVE_PMU_SRAM_BASE (DOVE_UNITID2PHYS(PMU) + 0xc000)
236 #define DOVE_PMU_PMUICR 0x50 /* PMU Interrupts Cause reg */
237 #define DOVE_PMU_PMUIMR 0x54 /* PMU Interrupts Mask reg */
268 #define DOVE_PMU_PMUCR 0x00 /* PMU Control Register */
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/allwinner/
sun50i-h5.dtsi 54 pmu {
55 compatible = "arm,cortex-a53-pmu";
142 * PMU, the actual silicon does not have the PMU
sun50i-a64-amarula-relic.dts 63 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/cavium/
thunder2-99xx.dtsi 85 pmu {
86 compatible = "brcm,vulcan-pmu", "arm,armv8-pmuv3";
87 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; /* PMU overflow */
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amd/
amd-seattle-soc.dtsi 41 pmu {
234 /* Perf CCN504 PMU */
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
dove.dtsi 91 MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU SRAM 1M */
156 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */
431 pmu: power-management@d0000 { label
432 compatible = "marvell,dove-pmu", "simple-bus";
448 resets = <&pmu 16>;
455 resets = <&pmu 18>;
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/
fsl-ls208xa.dtsi 251 pmu {
253 interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/
nouveau_nvkm_engine_device_base.c 1183 .pmu = gt215_pmu_new,
1217 .pmu = gt215_pmu_new,
1250 .pmu = gt215_pmu_new,
1347 .pmu = gt215_pmu_new,
1383 .pmu = gf100_pmu_new,
1420 .pmu = gf100_pmu_new,
1456 .pmu = gf100_pmu_new,
1492 .pmu = gf100_pmu_new,
1529 .pmu = gf100_pmu_new,
1566 .pmu = gf100_pmu_new
    [all...]

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