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    Searched refs:PP_SMU_NUM_FCLK_DPM_LEVELS (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
dm_pp_smu.h 248 #define PP_SMU_NUM_FCLK_DPM_LEVELS 4
261 struct dpm_clock FClocks[PP_SMU_NUM_FCLK_DPM_LEVELS];
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/
amdgpu_rn_clk_mgr.c 646 ASSERT(PP_SMU_NUM_FCLK_DPM_LEVELS <= MAX_NUM_DPM_LVL);
650 for (i = PP_SMU_NUM_FCLK_DPM_LEVELS - 1; i >= 0; i--) {

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