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Searched refs:PSC_CR (Results 1 - 3 of 3) sorted by relevancy

/src/sys/arch/powerpc/mpc5200/
pscreg.h	`49 #define PSC_CR 0x08 /* Command Register (wo, 8-bit) / 84 / Command Register (PSC_CR) bits. */`
psc.c	`213 PSC_WRITE_1(sc, PSC_CR, CMD_TX_DISABLE \| CMD_RX_DISABLE); 221 PSC_WRITE_1(sc, PSC_CR, CMD_RESET_MR); 225 PSC_WRITE_1(sc, PSC_CR, CMD_RESET_MR); 231 PSC_WRITE_1(sc, PSC_CR, CMD_RESET_ERR); 232 PSC_WRITE_1(sc, PSC_CR, CMD_TX_ENABLE \| CMD_RX_ENABLE); 302 bus_space_write_1(iot, ioh, PSC_CR, CMD_TX_DISABLE \| CMD_RX_DISABLE); 306 bus_space_write_1(iot, ioh, PSC_CR, CMD_TX_ENABLE \| CMD_RX_ENABLE); 336 PSC_WRITE_1(sc, PSC_CR, CMD_RESET_ERR);`
mpc5200_ac97.c	`318 WR1(sc, PSC_CR, CMD_RESET_RX); 319 WR1(sc, PSC_CR, CMD_RESET_TX); 320 WR1(sc, PSC_CR, CMD_RESET_ERR); 321 WR1(sc, PSC_CR, CMD_RESET_MR); 429 WR1(sc, PSC_CR, CMD_TX_DISABLE \| CMD_RX_DISABLE); 434 WR1(sc, PSC_CR, CMD_TX_ENABLE \| CMD_RX_ENABLE);`

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