| /src/sys/arch/powerpc/include/ |
| psl.h | 54 #define PSL_EE 0x00008000 /* B468 external interrupt enable */
114 #define PSL_USERSET (PSL_EE | PSL_PR | PSL_IS | PSL_DS | PSL_ME | PSL_CE)
119 #define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR | PSL_ME)
121 #define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR)
|
| profile.h | 141 __asm volatile("mtmsr %0" :: "r"(s & ~PSL_EE))
|
| /src/sys/arch/evbppc/pmppc/ |
| pmppc_locore.S | 122 ori 3,3,PSL_EE@l
129 andi. 3,3,~PSL_EE@l
|
| machdep.c | 274 : "=r"(msr) : "K"(PSL_EE));
|
| /src/sys/arch/powerpc/powerpc/ |
| clock.c | 123 : "=r"(msr) : "K"(PSL_EE|PSL_RI));
184 mtmsr(msr | PSL_EE);
195 mtmsr(msr | PSL_EE);
263 : "=r"(msr), "=r"(scratch) : "K"((u_short)~PSL_EE));
279 : "=r"(msr), "=r"(scratch) : "K"((u_short)~PSL_EE));
|
| fpu.c | 83 mtmsr((msr & ~PSL_EE) | PSL_FP);
108 mtmsr((msr & ~PSL_EE) | PSL_FP);
154 mtmsr((msr & ~PSL_EE) | PSL_FP);
|
| locore_subr.S | 203 andi. %r3,%r3,~PSL_EE@l /* disable interrupts while
277 ori %r4,%r4,PSL_EE@l /* interrupts are okay again */
324 andi. %r5,%r5,PSL_EE@l
406 andi. %r28,%r29,~PSL_EE@l /* disable interrupts while
|
| /src/sys/arch/ibmnws/ibmnws/ |
| locore.S | 149 ori 4,3,PSL_EE@l
156 andi. 4,3,~PSL_EE@l
|
| machdep.c | 186 : "=r"(msr) : "K"(PSL_EE));
|
| /src/sys/arch/evbppc/ev64260/ |
| ev64260_locore.S | 237 ori 3,3,PSL_EE@l
253 andi. 4,3,~PSL_EE@l
256 andi. 3,3,PSL_EE@l
|
| /src/sys/arch/prep/prep/ |
| locore.S | 158 ori 4,3,PSL_EE@l
165 andi. 4,3,~PSL_EE@l
|
| /src/sys/arch/rs6000/rs6000/ |
| locore.S | 163 ori 4,3,PSL_EE@l
170 andi. 4,3,~PSL_EE@l
|
| /src/sys/arch/evbppc/wii/ |
| wii_locore.S | 139 ori %r3, %r3, PSL_EE@l
146 andi. %r3, %r3, ~PSL_EE@l
|
| /src/sys/arch/powerpc/pic/ |
| ipi.c | 86 msr = (mfmsr() & ~PSL_EE) | PSL_POW;
|
| intr.c | 476 mtmsr(msr & ~PSL_EE);
519 const register_t dmsr = emsr & ~PSL_EE;
521 KASSERT(emsr & PSL_EE);
589 mtmsr(msr & ~PSL_EE);
615 mtmsr(msr | PSL_EE);
619 mtmsr(msr & ~PSL_EE);
629 mtmsr(msr | PSL_EE);
|
| /src/sys/arch/powerpc/oea/ |
| altivec.c | 88 mtmsr((msr & ~PSL_EE) | PSL_VEC);
125 mtmsr((msr & ~PSL_EE) | PSL_VEC);
223 msr = (omsr & ~PSL_EE) | PSL_VEC;
283 msr = (omsr & ~PSL_EE) | PSL_VEC;
|
| /src/sys/arch/mvmeppc/mvmeppc/ |
| locore.S | 181 ori %r3,%r3,PSL_EE@l
188 andi. %r3,%r3,~PSL_EE@l
|
| machdep.c | 185 : "=r"(msr) : "K"(PSL_EE));
|
| /src/sys/arch/powerpc/include/booke/ |
| cpuvar.h | 154 __asm __volatile("wrteei\t%0" :: "n"((msr & PSL_EE) ? 1 : 0));
|
| /src/sys/arch/powerpc/booke/ |
| spe.c | 91 mtmsr((msr & ~PSL_EE) | PSL_SPV);
122 mtmsr((msr & ~PSL_EE) | PSL_SPV);
|
| e500_timer.c | 131 wrtee(PSL_EE); /* Reenable interrupts */
|
| e500_intr.c | 538 wrtee(PSL_EE);
546 wrtee(PSL_EE);
583 msr = PSL_EE;
960 if (mfmsr() & PSL_EE)
978 KASSERTMSG((mfmsr() & PSL_EE) == 0,
1023 wrtee(PSL_EE);
1047 KASSERTMSG((mfmsr() & PSL_EE) == 0,
1073 wrtee(PSL_EE); /* reenable interrupts */
1216 KASSERT(mfmsr() & PSL_EE);
|
| /src/sys/arch/powerpc/include/oea/ |
| spr.h | 326 mtmsr(msr & ~PSL_EE);
345 mtmsr(msr & ~PSL_EE);
|
| /src/sys/arch/sandpoint/sandpoint/ |
| machdep.c | 280 : "K"(PSL_EE));
401 msr &= ~PSL_EE;
|
| /src/sys/arch/rs6000/stand/boot/ |
| boot.c | 72 #define PSL_EE 0x00008000
|
