| /src/sys/arch/riscv/riscv/ |
| bus_space_generic.S | 52 PTR_L a5, BS_STRIDE(a0) /* stride */
62 PTR_L a5, BS_STRIDE(a0) /* stride */
72 PTR_L a5, BS_STRIDE(a0) /* stride */
83 PTR_L a5, BS_STRIDE(a0) /* stride */
97 PTR_L a5, BS_STRIDE(a0) /* stride */
120 PTR_L a5, BS_STRIDE(a0) /* stride */
143 PTR_L a5, BS_STRIDE(a0) /* stride */
167 PTR_L a5, BS_STRIDE(a0) /* stride */
191 PTR_L a5, BS_STRIDE(a0) /* stride */
217 PTR_L a5, BS_STRIDE(a0) /* stride *
[all...] |
| spl.S | 56 PTR_L a3, L_CPU(tp) // get curcpu()
92 PTR_L a3, L_CPU(tp) // get curcpu()
192 PTR_L a3, L_CPU(tp) // get curcpu()
|
| cpu_switch.S | 64 PTR_L t1, L_CPU(tp) // # get curcpu
134 // PTR_L t0, L_CPU(tp) // Get curcpu()
178 PTR_L t1, L_CPU(tp) // get curcpu()
191 PTR_L sp, L_MD_KTF(tp) // switch to its stack
197 PTR_L t1, L_CPU(tp) // get curcpu() again
233 PTR_L sp, L_MD_UTF(tp) // trapframe pointer loaded
418 PTR_L t0, L_PROC(tp) // get proc struct
419 PTR_L t0, P_MD_SYSCALL(t0) // get syscall address from proc
|
| locore.S | 114 PTR_L s8, .Lstart
314 PTR_L t0, .Lconsaddr
446 PTR_L s8, .Lstart
535 PTR_L tp, CI_IDLELWP(a0) /* tp = curcpu()->ci_idlelwp */
539 PTR_L t2, L_PCB(tp) /* t2 = lwp_getpcb(idlelwp) */
545 PTR_L a0, L_CPU(tp) /* curlwp->l_cpu */
|
| /src/lib/csu/arch/mips/ |
| crt0.S | 55 PTR_L t9,%call16(_C_LABEL(___start))(gp)
|
| /src/lib/libc/arch/riscv/sys/ |
| sbrk.S | 43 PTR_L t2, 0(t1)
|
| brk.S | 59 PTR_L t5, 0(t1)
|
| /src/lib/libc/arch/mips/gen/ |
| swapcontext.S | 49 PTR_L ra, CALLFRAME_RA(sp)
52 PTR_L v1, 0(sp) # load oucp again for adjustment
53 PTR_L a0, SZREG(sp) # load ucp
|
| _resumecontext.S | 77 PTR_L a0, _UC_LINK(a0) # linked context?
|
| /src/sys/arch/mips/mips/ |
| copy.S | 72 PTR_L v1, L_PCB(MIPS_CURLWP)
106 PTR_L v1, L_PCB(MIPS_CURLWP)
161 PTR_L v1, L_PCB(MIPS_CURLWP) # set up fault handler
163 PTR_L s0, PCB_ONFAULT(v1) # save old handler
167 PTR_L v1, L_PCB(MIPS_CURLWP) # restore the old handler
177 PTR_L v1, L_PCB(MIPS_CURLWP) # restore the old handler
199 PTR_L v1, L_PCB(MIPS_CURLWP)
204 PTR_L v1, L_PCB(MIPS_CURLWP)
226 PTR_L v1, L_PCB(MIPS_CURLWP)
231 PTR_L v1, L_PCB(MIPS_CURLWP
[all...] |
| lock_stubs_ras.S | 116 PTR_L t0, (a0) /* <- critical section start */
198 PTR_L t0, (a0) /* <- critical section start */
217 PTR_L t0, (a0) /* <- critical section start */
325 PTR_L v1, L_PCB(MIPS_CURLWP)
340 PTR_L v1, L_PCB(MIPS_CURLWP)
365 PTR_L t2, L_CPU(MIPS_CURLWP)
414 PTR_L t2, L_CPU(MIPS_CURLWP)
|
| locore.S | 179 PTR_L sp, L_PCB(MIPS_CURLWP) # switch to lwp0 stack
224 PTR_L v0, L_CPU(MIPS_CURLWP)
247 PTR_L a2, L_PCB(a0) # a2 = pcb of old lwp
287 PTR_L t2, L_CPU(MIPS_CURLWP)
313 PTR_L a0, L_PROC(MIPS_CURLWP) # argument to ras_lookup
314 PTR_L s5, L_PCB(MIPS_CURLWP) # XXXuvm_lwp_getuarea
315 PTR_L v1, P_RASLIST(a0) # get raslist
320 PTR_L a1, (USPACE - TF_SIZ - CALLFRAME_SIZ + TF_REG_EPC)(s5)
384 PTR_L t0, L_PCB(MIPS_CURLWP) # t0 = curlwp->l_addr
428 PTR_L s1, L_CPU(MIPS_CURLWP) # get curcpu(
[all...] |
| spl.S | 71 PTR_L a3, L_CPU(MIPS_CURLWP)
92 PTR_L a3, L_CPU(MIPS_CURLWP) # make sure curcpu is correct
120 PTR_L a3, L_CPU(MIPS_CURLWP) # get cpu_info
174 PTR_L a3, L_CPU(MIPS_CURLWP)
252 PTR_L a3, L_CPU(MIPS_CURLWP)
266 PTR_L a3, L_CPU(MIPS_CURLWP) # make sure curcpu is correct
372 PTR_L t0, L_CPU(MIPS_CURLWP)
|
| lock_stubs_llsc.S | 124 PTR_L v1, L_PCB(MIPS_CURLWP)
154 PTR_L v1, L_PCB(MIPS_CURLWP)
228 PTR_L t2, L_CPU(MIPS_CURLWP)
291 PTR_L t2, L_CPU(MIPS_CURLWP)
|
| locore_octeon.S | 144 1: PTR_L a1, (t0) # get cpu_info pointer
145 SYNC_ACQ # PTR_L/SYNC_ACQ matches
174 PTR_L k0, (k1) # get cpu_info
|
| mipsX_subr.S | 395 PTR_L k1, %lo(CPUVAR(PMAP_SEGTAB))(k1)#0b: k1=segment tab
398 PTR_L k1, 0(k1) #0e: k1=seg entry
406 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#14: k1=segment tab base
441 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#05: k1=seg0tab
454 PTR_L k1, 0(k1) #09: k1=seg entry
554 PTR_L k1, %lo(CPUVAR(PMAP_SEGTAB))(k1)#09: k1=segment tab
558 PTR_L k1, 0(k1) #0d: k1=seg entry address
570 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#0b: k1=segment tab base
596 PTR_L k1, %lo(CPUVAR(CURLWP))(k1) #07: k1=lo of curlwp
634 PTR_L k0, 0(k0) #09: get the function addres
[all...] |
| locore_mips1.S | 101 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1) #04: k1=seg0tab
104 PTR_L k1, 0(k1) #09: k1=seg entry
155 PTR_L k0, 0(k0) #09: get the function address
211 PTR_L k0, L_PCB(MIPS_CURLWP)
216 PTR_L k0, L_PCB(MIPS_CURLWP)
278 PTR_L t0, L_CPU(MIPS_CURLWP)
324 PTR_L t0, L_CPU(MIPS_CURLWP)
397 PTR_L k0, L_PCB(MIPS_CURLWP)
402 PTR_L k0, L_PCB(MIPS_CURLWP)
408 PTR_L k0, L_CPU(MIPS_CURLWP
[all...] |
| /src/sys/arch/evbmips/ingenic/ |
| cpu_startup.S | 55 1: PTR_L MIPS_CURLWP, CPU_INFO_IDLELWP(a0)
70 PTR_L sp, L_MD_UTF(MIPS_CURLWP) # fetch KSP
127 PTR_L a1, _C_LABEL(startup_cpu_info)
|
| /src/lib/libc/arch/mips/sys/ |
| cerror.S | 68 PTR_L gp, CALLFRAME_GP(sp) # restore caller gp
71 PTR_L ra, CALLFRAME_RA(sp)
|
| brk.S | 61 PTR_L v0, 0(t0)
|
| sbrk.S | 60 PTR_L t1, 0(t0)
|
| /src/libexec/ld.elf_so/arch/riscv/ |
| rtld_start.S | 55 PTR_L t0, %pcrel_lo(.L0)(gp) # &_DYNAMIC
67 PTR_L a0, 2 * PTRSZ(sp) # cleanup function
68 // PTR_L a1, 3 * PTRSZ(sp) # obj_main pointer (not used)
|
| /src/sys/arch/mips/rmi/ |
| rmixl_spl.S | 114 PTR_L a3, L_CPU(MIPS_CURLWP) ##
135 PTR_L a3, L_CPU(MIPS_CURLWP) ## get cpu_info
145 PTR_L a3, L_CPU(MIPS_CURLWP) ## get cpu_info
199 PTR_L a3, L_CPU(MIPS_CURLWP) ## get cpu_info from curlwp
307 PTR_L t0, L_CPU(MIPS_CURLWP)
|
| /src/sys/dev/arcbios/ |
| arcbios_calls.S | 57 PTR_L t9, _C_LABEL(ARCBIOS)
98 PTR_L t9, _C_LABEL(ARCBIOS)
121 PTR_L t9, _C_LABEL(ARCBIOS); \
|
| /src/libexec/ld.elf_so/arch/mips/ |
| rtld_start.S | 66 PTR_L a1, 2*PTR_SIZE(sp) # our atexit function
67 PTR_L a2, 3*PTR_SIZE(sp) # obj_main entry
|
