| /src/tests/kernel/arch/riscv/ |
| execsp.S | 49 PTR_S sp, 0(t0) /* startsp := sp */
61 PTR_S sp, 0(t0) /* ctorsp := sp */
79 PTR_S sp, 0(t0) /* mainsp := sp */
93 PTR_S sp, 0(t0) /* dtorsp := sp */
|
| signalsphandler.S | 43 PTR_S sp, 0(t0) /* signalsp := sp */
|
| contextspfunc.S | 43 PTR_S sp, 0(t0) /* contextsp := sp */
|
| /src/tests/kernel/arch/mips/ |
| signalsphandler.S | 50 PTR_S sp, 0(t1) /* store signalsp := stack pointer */
|
| contextspfunc.S | 50 PTR_S sp, 0(t1) /* store contextsp := stack pointer */
|
| execsp.S | 51 PTR_S sp, 0(t1) /* store startsp := stack pointer */
67 PTR_S sp, 0(t1) /* store ctorsp := stack pointer */
90 PTR_S sp, 0(t1) /* store mainsp := stack pointer */
109 PTR_S sp, 0(t1) /* store dtorsp := stack pointer */
|
| /src/sys/arch/mips/mips/ |
| copy.S | 75 PTR_S v0, PCB_ONFAULT(v1)
92 PTR_S a2, 0(a3)
95 PTR_S zero, PCB_ONFAULT(v1)
109 PTR_S v0, PCB_ONFAULT(v1)
126 PTR_S a2, 0(a3)
129 PTR_S zero, PCB_ONFAULT(v1)
134 PTR_S zero, PCB_ONFAULT(v1)
165 PTR_S v0, PCB_ONFAULT(v1)
169 PTR_S s0, PCB_ONFAULT(v1)
179 PTR_S s0, PCB_ONFAULT(v1
[all...] |
| lock_stubs_ras.S | 121 PTR_S a2, (a0) /* <- critical section end */
163 PTR_S zero, PCB_ONFAULT(v1)
184 PTR_S zero, PCB_ONFAULT(v1)
203 PTR_S MIPS_CURLWP, (a0)/* <- critical section end */
222 PTR_S zero, (a0) /* <- critical section end */
327 PTR_S v0, PCB_ONFAULT(v1)
342 PTR_S v0, PCB_ONFAULT(v1)
354 PTR_S zero, PCB_ONFAULT(v1) # reset fault handler
|
| lock_stubs_llsc.S | 125 PTR_S v0, PCB_ONFAULT(v1)
140 2: PTR_S zero, PCB_ONFAULT(v1)
155 PTR_S v0, PCB_ONFAULT(v1)
170 2: PTR_S zero, PCB_ONFAULT(v1)
177 PTR_S zero, PCB_ONFAULT(v1) # reset fault handler
|
| locore_mips3.S | 677 PTR_S v0, PCB_ONFAULT(v1)
698 PTR_S zero, PCB_ONFAULT(v1)
708 PTR_S zero, PCB_ONFAULT(v1)
817 PTR_S MIPS_CURLWP, CPU_INFO_CURLWP(a0)
|
| locore.S | 309 PTR_S MIPS_CURLWP, CPU_INFO_CURLWP(t2)
324 PTR_S v0, (USPACE - TF_SIZ - CALLFRAME_SIZ + TF_REG_EPC)(s5)
431 PTR_S MIPS_CURLWP, CPU_INFO_CURLWP(s1) # ...
450 PTR_S MIPS_CURLWP, CPU_INFO_CURLWP(s1) # ....
505 PTR_S t1, PCB_ONFAULT(t0) # save onfault handler
512 PTR_S t2, 0(a1) # return the cpu_info
515 PTR_S zero, PCB_ONFAULT(t0) # reset fault handler
|
| mipsX_subr.S | 2256 PTR_S t3, TLBMASK_HI(a1)
2908 PTR_S k0, 0(k1)
2911 PTR_S k0, 0(k1)
2946 PTR_S k0, 0(k1)
|
| /src/lib/libc/arch/riscv/sys/ |
| sbrk.S | 48 PTR_S t5, 0(t1) // save new val of curbrk from above
|
| brk.S | 66 PTR_S t5, __SIZEOF_POINTER__(t1) /* success */
|
| /src/lib/libc/arch/mips/gen/ |
| swapcontext.S | 45 PTR_S ra, CALLFRAME_RA(sp) # save ra
46 PTR_S a0, 0(sp) # stash away oucp
47 PTR_S a1, SZREG(sp) # stash away ucp
|
| _resumecontext.S | 67 PTR_S zero, _UC_LINK(a0) # make sure uc_link is 0
|
| /src/lib/libc/arch/mips/sys/ |
| cerror.S | 55 PTR_S ra, CALLFRAME_RA(sp)
58 PTR_S t3, CALLFRAME_GP(sp) # save caller gp (in t3)
|
| brk.S | 69 PTR_S a0, 0(t0)
|
| sbrk.S | 66 PTR_S a0, 0(t0) # save current val of curbrk from above
|
| /src/sys/arch/sgimips/stand/common/ |
| start.S | 106 PTR_S v0, _C_LABEL(ARCBIOS) # save ARCBIOS
|
| /src/sys/arch/evbmips/ingenic/ |
| cpu_startup.S | 64 PTR_S MIPS_CURLWP, CPU_INFO_CURLWP(a0)
|
| /src/sys/arch/riscv/riscv/ |
| locore.S | 373 PTR_S t0, L_PCB(tp) // set uarea of lwp (already zeroed)
375 PTR_S sp, L_MD_UTF(tp) // store pointer to empty trapframe
380 PTR_S t2, PM_PDETAB(t1) // VA of kernel PDETAB
381 PTR_S t3, PM_MD_PPN(t1) // PPN of kernel PDETAB
392 PTR_S s8, 0(t0) /* kern_vtopdiff = start(virt) - start(phys) */
536 PTR_S tp, CI_CURLWP(a0) /* curlwp is idlelwp */
|
| cpu_switch.S | 85 PTR_S tp, CI_CURLWP(t1) // # update curcpu with the new curlwp
180 PTR_S sp, L_MD_KTF(tp) // save trapframe ptr in oldlwp
183 PTR_S tp, CI_CURLWP(t1) // update curlwp
200 PTR_S tp, CI_CURLWP(t1) // restore curlwp
479 PTR_S a0, L_MD_ONFAULT(tp)
|
| /src/sys/arch/riscv/include/ |
| asm.h | 180 #define PTR_S sd
187 #define PTR_S sw
|
| /src/sys/arch/mips/include/ |
| asm.h | 432 #define PTR_S sw
456 #define PTR_S sw
463 #define PTR_S sd
|
